公开(公告)号：US20170286290A1

公开(公告)日：2017-10-05

申请号：US15630376

申请日：2017-06-22

Applicant: Apple Inc.

Inventor： Daniel J. Post ,  Nir Jacob Wakrat

IPC: G06F12/02 ,  G06F21/71 ,  G06F12/14 ,  G06F3/06 ,  G06F13/16 ,  G06F21/79

CPC classification number: G06F12/0246 ,  G06F3/061 ,  G06F3/0613 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/068 ,  G06F12/1408 ,  G06F13/1673 ,  G06F21/71 ,  G06F21/79 ,  G06F2212/1052 ,  Y02D10/14

Abstract: Systems and methods are disclosed for efficient buffering for a system having non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently re-ordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.

公开(公告)号：US09690953B2

公开(公告)日：2017-06-27

申请号：US14212049

申请日：2014-03-14

Applicant: Apple Inc.

Inventor： Andrew W. Vogan ,  Matthew J. Byom ,  Alexander C. Sanks ,  Daniel J. Post ,  Hari Hara Kumar Maharaj ,  Nir Jacob Wakrat ,  Kenneth L. Herman

IPC: G06F21/00 ,  G06F21/79

CPC classification number: G06F21/79 ,  G06F2221/2107

Abstract: Systems and methods are disclosed for generating efficient reads for a system having non-volatile memory (“NVM”). A read command can be separated by a host processor of the system into two phases: a) transmitting a command to a storage processor of the system, where the command is associated with one or more logical addresses, and b) generating data transfer information. The host processor can generate the data transfer information while the storage processor is processing the command from the host processor. Once the data transfer information has been generated and data has been read from the NVM, the data can be transferred.

公开(公告)号：US09477596B2

公开(公告)日：2016-10-25

申请号：US14754433

申请日：2015-06-29

Applicant: Apple Inc.

Inventor： Daniel J. Post ,  Nir Jacob Wakrat ,  Vadim Khmelnitsky

IPC: G06F12/02

CPC classification number: G06F12/0253 ,  G06F12/0238 ,  G06F12/0246 ,  G06F2212/1024 ,  G06F2212/1044 ,  G06F2212/7201 ,  G06F2212/7205 ,  G06F2212/7209

Abstract: Systems and methods are disclosed for logical block address (“LBA) bitmap usage for a system having non-volatile memory (“NVM”). A bitmap can be stored in volatile memory of the system, where the bitmap can store the mapping statuses of one or more logical addresses. By using the bitmap, the system can determine the mapping status of a LBA without having to access the NVM. In addition, the system can update the mapping status of a LBA with minimal NVM accesses. By reducing the number of NVM accesses, the system can avoid triggering a garbage collection process, which can improve overall system performance.

公开(公告)号：US20150301938A1

公开(公告)日：2015-10-22

申请号：US14754433

申请日：2015-06-29

Applicant: Apple Inc.

Inventor： Daniel J. Post ,  Nir Jacob Wakrat ,  Vadim Khmelnitsky

IPC: G06F12/02

CPC classification number: G06F12/0253 ,  G06F12/0238 ,  G06F12/0246 ,  G06F2212/1024 ,  G06F2212/1044 ,  G06F2212/7201 ,  G06F2212/7205 ,  G06F2212/7209

Abstract: Systems and methods are disclosed for logical block address (“LBA) bitmap usage for a system having non-volatile memory (“NVM”). A bitmap can be stored in volatile memory of the system, where the bitmap can store the mapping statuses of one or more logical addresses. By using the bitmap, the system can determine the mapping status of a LBA without having to access the NVM. In addition, the system can update the mapping status of a LBA with minimal NVM accesses. By reducing the number of NVM accesses, the system can avoid triggering a garbage collection process, which can improve overall system performance.

Abstract translation: 公开了用于具有非易失性存储器（“NVM”）的系统的逻辑块地址（“LBA”）位图使用的系统和方法。 位图可以存储在系统的易失性存储器中，其中位图可以存储一个或多个逻辑地址的映射状态。 通过使用位图，系统可以确定LBA的映射状态，而无需访问NVM。 此外，系统可以使用最小的NVM访问来更新LBA的映射状态。 通过减少NVM访问次数，系统可以避免触发垃圾收集过程，从而提高整体系统性能。

公开(公告)号：US09158608B2

公开(公告)日：2015-10-13

申请号：US14291316

申请日：2014-05-30

Applicant: Apple Inc.

Inventor： Michael J. Cornwell ,  Christopher P. Dudte ,  Nir Jacob Wakrat

IPC: G06F12/00 ,  G06F11/07 ,  G06F12/02 ,  G06F3/06

CPC classification number: G06F11/0727 ,  G06F3/0679 ,  G06F11/0742 ,  G06F11/0748 ,  G06F11/0766 ,  G06F11/0778 ,  G06F12/0246

Abstract: Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host. Metadata may be analyzed using the external host and/or at least a portion of the metadata may be modified based on the analysis. Modified metadata may be transmitted from the external host to a memory controller of the host.

Abstract translation: 系统和过程可用于从便携式设备的非易失性存储器检索元数据，并将所检索的元数据发送到外部主机。 可以使用外部主机来分析元数据，和/或可以基于分析修改元数据的至少一部分。 修改的元数据可以从外部主机发送到主机的存储器控​​制器。

公开(公告)号：US09110787B2

公开(公告)日：2015-08-18

申请号：US14160763

申请日：2014-01-22

Applicant: Apple Inc.

Inventor： Michael J. Cornwell ,  Christopher P. Dudte ,  Nir Jacob Wakrat

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F12/0253 ,  G06F2212/1016 ,  G06F2212/7211

Abstract: Systems and processes may use a host and an external host. The host may be a portable device that includes a memory, a memory controller, and a communication interface for communication with the external host. The portable device may receive a command signal from the external host and initiate a predetermined amount of wear leveling in response to the command signal.

Abstract translation: 系统和进程可以使用主机和外部主机。 主机可以是包括存储器，存储器控制器和用于与外部主机通信的通信接口的便携式设备。 便携式设备可以从外部主机接收命令信号，并响应于命令信号启动预定量的磨损均衡。

公开(公告)号：US09069660B2

公开(公告)日：2015-06-30

申请号：US13840008

申请日：2013-03-15

Applicant: Apple Inc.

Inventor： Nir Jacob Wakrat ,  Matthew J. Byom

IPC: G06F12/02 ,  G11C16/10 ,  G11C16/00

CPC classification number: G06F12/0246 ,  G06F2212/7203 ,  G11C16/00 ,  G11C16/10

Abstract: Systems and methods for writing to high-capacity memory are disclosed. In high-capacity memory systems in which the capacity of the characteristic portion of the memory (e.g., a page of NAND flash memory) exceeds the capacity of a buffer used to write to the memory, underutilization issues are prevalent. Data organized in the buffer can be combined with additional data to improve utilization of the characteristic portion. According to various embodiments, the additional data can include duplicate copies of the data, whitened data, or any other suitable type of data.

Abstract translation: 公开了用于写入大容量存储器的系统和方法。 在其中存储器的特征部分（例如，NAND闪存的页面）的容量超过用于写入存储器的缓冲器的容量的大容量存储器系统中，利用不足的问题是普遍的。 组织在缓冲器中的数据可以与附加数据组合，以提高特征部分的利用率。 根据各种实施例，附加数据可以包括数据的重复副本，白化数据或任何其他合适类型的数据。

公开(公告)号：US20140281176A1

公开(公告)日：2014-09-18

申请号：US14291316

申请日：2014-05-30

Applicant: Apple Inc.

Inventor： Michael J. Cornwell ,  Christopher P. Dudte ,  Nir Jacob Wakrat

IPC: G06F11/07 ,  G06F12/02

CPC classification number: G06F11/0727 ,  G06F3/0679 ,  G06F11/0742 ,  G06F11/0748 ,  G06F11/0766 ,  G06F11/0778 ,  G06F12/0246

Abstract: Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host. Metadata may be analyzed using the external host and/or at least a portion of the metadata may be modified based on the analysis. Modified metadata may be transmitted from the external host to a memory controller of the host.

Abstract translation: 系统和过程可用于从便携式设备的非易失性存储器检索元数据，并将所检索的元数据发送到外部主机。 可以使用外部主机来分析元数据，和/或可以基于分析修改元数据的至少一部分。 修改的元数据可以从外部主机发送到主机的存储器控​​制器。

公开(公告)号：US20140281136A1

公开(公告)日：2014-09-18

申请号：US13840008

申请日：2013-03-15

Applicant: APPLE INC.

Inventor： Nir Jacob Wakrat ,  Matthew J. Byom

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7203 ,  G11C16/00 ,  G11C16/10

Abstract: Systems and methods for writing to high-capacity memory are disclosed. In high-capacity memory systems in which the capacity of the characteristic portion of the memory (e.g., a page of NAND flash memory) exceeds the capacity of a buffer used to write to the memory, underutilization issues are prevalent. Data organized in the buffer can be combined with additional data to improve utilization of the characteristic portion. According to various embodiments, the additional data can include duplicate copies of the data, whitened data, or any other suitable type of data.

Abstract translation: 公开了用于写入大容量存储器的系统和方法。 在其中存储器的特征部分（例如，NAND闪存的页面）的容量超过用于写入存储器的缓冲器的容量的大容量存储器系统中，利用不足的问题是普遍的。 组织在缓冲器中的数据可以与附加数据组合，以提高特征部分的利用率。 根据各种实施例，附加数据可以包括数据的重复副本，白化数据或任何其他合适类型的数据。

公开(公告)号：US20130283081A1

公开(公告)日：2013-10-24

申请号：US13918240

申请日：2013-06-14

Applicant: Apple Inc.

Inventor： Nir Jacob Wakrat ,  Anthony Fai ,  Matthew Byom

IPC: G06F1/32

CPC classification number: G06F1/3275 ,  G06F1/3225 ,  Y02D10/13 ,  Y02D10/14

Abstract: In a non-volatile memory system, physically separate power rails are provided from a host system to a NVM device for independently power cycling a controller and memory array in the NVM device. The controller of the NVM device can send a power cycle request signal to the host system over a host channel, or updates a status register in the NVM device. The host system receives and decodes the power cycle request signal, or reads the status register, and performs the power cycle request, which can include power cycling the controller or the memory array in the NVM device, or both. The power cycle request can be based on a power state of the non-volatile memory system, which can be managed by the controller or the host system, or both.

Abstract translation: 在非易失性存储器系统中，物理上分离的电源轨从主机系统提供给NVM设备，用于独立地对NVM设备中的控制器和存储器阵列进行电力循环。 NVM设备的控制器可以通过主机通道向主机系统发送电源循环请求信号，或更新NVM设备中的状态寄存器。 主机系统接收并解码电源周期请求信号，或读取状态寄存器，并执行电源循环请求，其中可以包括对NVM设备中的控制器或存储器阵列进行电源循环，或两者兼而有之。 功率循环请求可以基于非易失性存储器系统的功率状态，其可以由控制器或主机系统管理，或两者兼而有之。