公开(公告)号：US20170102899A1

公开(公告)日：2017-04-13

申请号：US15385429

申请日：2016-12-20

Applicant: APPLE INC.

Inventor： Daniel J. Post ,  Matthew J. Byom ,  Vadim Khmelnitsky ,  Nir Jacob Wakrat ,  Kenneth L. Herman

IPC: G06F3/06 ,  G11C29/52 ,  G06F11/10

CPC classification number: G06F3/0643 ,  G06F3/061 ,  G06F3/0644 ,  G06F3/0652 ,  G06F3/0679 ,  G06F11/1068 ,  G06F12/0246 ,  G06F2212/7202 ,  G11C29/52

Abstract: Systems and methods are disclosed for partitioning data for storage in a non-volatile memory (“NVM”), such as flash memory. In some embodiments, a priority may be assigned to data being stored, and the data may be logically partitioned based on the priority. For example, a file system may identify a logical address within a first predetermined range for higher priority data and within a second predetermined range for lower priority data, such using a union file system. Using the logical address, a NVM driver can determine the priority of data being stored and can process (e.g., encode) the data based on the priority. The NVM driver can store an identifier in the NVM along with the data, and the identifier can indicate the processing techniques used on the associated data.

公开(公告)号：US09342449B2

公开(公告)日：2016-05-17

申请号：US14745994

申请日：2015-06-22

Applicant: Apple Inc.

Inventor： Daniel J. Post ,  Vadim Khmelnitsky ,  Nir Jacob Wakrat

IPC: G06F12/02 ,  G06F11/14 ,  G06F11/16

CPC classification number: G06F12/0246 ,  G06F11/1402 ,  G06F11/1666 ,  G06F2212/7201 ,  G06F2212/7207

Abstract: Systems and methods are provided for storing data to or reading data from a non-volatile memory (“NVM”), such as flash memory, using a metadata redundancy scheme. In some embodiments, an electronic device, which includes an NVM, may also include a memory interface for controlling access to the NVM. The memory interface may receive requests to write user data to the NVM. The user data from each request may be associated with metadata, such as a logical address, flags, or other data. In response to a write request, the NVM interface may store the user data and its associated metadata in a first memory location (e.g., page), and may store a redundant copy of the metadata in a second memory location. This way, even if the first memory location becomes inaccessible, the memory interface can still recover the metadata from the backup copy stored in the second memory location.

公开(公告)号：US20150309928A1

公开(公告)日：2015-10-29

申请号：US14745994

申请日：2015-06-22

Applicant: Apple Inc.

Inventor： Daniel J. Post ,  Vadim Khmelnitsky ,  Nir Jacob Wakrat

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F11/1402 ,  G06F11/1666 ,  G06F2212/7201 ,  G06F2212/7207

Abstract: Systems and methods are provided for storing data to or reading data from a non-volatile memory (“NVM”), such as flash memory, using a metadata redundancy scheme. In some embodiments, an electronic device, which includes an NVM, may also include a memory interface for controlling access to the NVM. The memory interface may receive requests to write user data to the NVM. The user data from each request may be associated with metadata, such as a logical address, flags, or other data. In response to a write request, the NVM interface may store the user data and its associated metadata in a first memory location (e.g., page), and may store a redundant copy of the metadata in a second memory location. This way, even if the first memory location becomes inaccessible, the memory interface can still recover the metadata from the backup copy stored in the second memory location.

Abstract translation: 提供了系统和方法，用于使用元数据冗余方案将数据存储到非易失性存储器（“NVM”）或从闪存中读取数据。 在一些实施例中，包括NVM的电子设备还可以包括用于控制对NVM的访问的存储器接口。 存储器接口可以接收将用户数据写入NVM的请求。 来自每个请求的用户数据可以与诸如逻辑地址，标志或其他数据的元数据相关联。 响应于写入请求，NVM接口可以将用户数据及其相关联的元数据存储在第一存储器位置（例如，页面）中，并且可以将元数据的冗余副本存储在第二存储器位置中。 这样，即使第一存储器位置变得不可访问，存储器接口仍然可以从存储在第二存储器位置的备份副本中恢复元数据。

公开(公告)号：US20140164717A1

公开(公告)日：2014-06-12

申请号：US14147700

申请日：2014-01-06

Applicant: Apple Inc.

Inventor： Nicholas C. Seroff ,  Anthony Fai ,  Nir Jacob Wakrat

IPC: G06F3/06

CPC classification number: G06F3/0611 ,  G06F3/061 ,  G06F3/0625 ,  G06F3/0634 ,  G06F3/0635 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0246 ,  G06F13/1684 ,  G06F2212/7204 ,  Y02D10/154

Abstract: Systems and methods are provided for improved communications in a nonvolatile memory (“NVM”) system. The system can toggle between multiple communications channels to provide point-to-point communications between a host device and NVM dies included in the system. The host device can toggle between multiple communications channels that extend to one or more memory controllers of the system, and the memory controllers can toggle between multiple communications channels that extend to the NVM dies. Power islands may be incorporated into the system to electrically isolate system components associated with inactive communications channels.

Abstract translation: 提供了用于在非易失性存储器（“NVM”）系统中改善通信的系统和方法。 系统可以在多个通信通道之间切换，以提供主机设备与系统中包含的NVM管芯之间的点对点通信。 主机设备可以在扩展到系统的一个或多个存储器控制器的多个通信通道之间切换，并且存储器控制器可以在延伸到NVM管芯的多个通信通道之间切换。 功率岛可以并入到系统中以电隔离与非活动通信信道相关联的系统组件。

公开(公告)号：US09996457B2

公开(公告)日：2018-06-12

申请号：US15630376

申请日：2017-06-22

Applicant: Apple Inc.

Inventor： Daniel J. Post ,  Nir Jacob Wakrat

IPC: G06F3/06 ,  G06F13/16 ,  G06F12/02 ,  G06F21/71 ,  G06F21/79 ,  G06F12/14

CPC classification number: G06F12/0246 ,  G06F3/061 ,  G06F3/0613 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/068 ,  G06F12/1408 ,  G06F13/1673 ,  G06F21/71 ,  G06F21/79 ,  G06F2212/1052 ,  Y02D10/14

Abstract: Systems and methods are disclosed for efficient buffering for a system having non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently re-ordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.

公开(公告)号：US09841917B2

公开(公告)日：2017-12-12

申请号：US14962339

申请日：2015-12-08

Applicant: Apple Inc.

Inventor： Vadim Khmelnitsky ,  Daniel J. Post ,  Nir Jacob Wakrat ,  Matthew J. Byom ,  Kenneth L. Herman ,  Alexander C. Sanks

IPC: G06F12/02 ,  G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0685 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7206

Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.

公开(公告)号：US20160092110A1

公开(公告)日：2016-03-31

申请号：US14962339

申请日：2015-12-08

Applicant: Apple Inc.

Inventor： Vadim Khmelnitsky ,  Daniel J. Post ,  Nir Jacob Wakrat ,  Matthew J. Byom ,  Kenneth L. Herman ,  Alexander C. Sanks

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0685 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7206

Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.

Abstract translation: 公开了用于配置非易失性存储器（“NVM”）的系统和方法。 在一些实施例中，NVM的每个块可以包括可以被编码（例如，游程长度编码）和动态尺寸的块内容表（“TOC”）。 因此，当用户数据被编程到块时，块TOC的大小可以被同时重新计算并且仅在必要时增加。 在一些实施例中，NVM接口可以使用存储在上下文信息中的编织序列和与块的每个页面相关联的至少一个编织序列来确定在系统启动之后跨块的页面是否重播。

公开(公告)号：US20140297935A1

公开(公告)日：2014-10-02

申请号：US14305488

申请日：2014-06-16

Applicant: Apple Inc.

Inventor： Daniel J. Post ,  Nir Jacob Wakrat ,  Vadim Khmelnitsky

IPC: G06F12/02

CPC classification number: G06F3/0643 ,  G06F11/1417 ,  G06F11/1435 ,  G06F12/0246 ,  G06F17/30218

Abstract: Systems and methods are disclosed for mount-time reconciliation of data availability. During system boot-up, a non-volatile memory (“NVM”) driver can be enumerated, and an NVM driver mapping can be obtained. The NVM driver mapping can include the actual availability of LBAs in the NVM. A file system can then be mounted, and a file system allocation state can be generated. The file system allocation state can indicate the file system's view of the availability of LBAs. Subsequently, data availability reconciliation can be performed. That is, the file system allocation state and the NVM driver mapping can be overlaid and compared with one another in order to expose any discrepancies.

Abstract translation: 披露了数据可用性的安装时间调节的系统和方法。 在系统启动期间，可以列举非易失性存储器（“NVM”）驱动程序，并且可以获得NVM驱动程序映射。 NVM驱动程序映射可以包括NVM中LBA的实际可用性。 然后可以安装文件系统，并且可以生成文件系统分配状态。 文件系统分配状态可以指示文件系统对LBA可用性的视图。 随后，可以执行数据可用性协调。 也就是说，文件系统分配状态和NVM驱动程序映射可以被叠加并相互比较，以便暴露任何差异。

公开(公告)号：US20140281588A1

公开(公告)日：2014-09-18

申请号：US14212049

申请日：2014-03-14

Applicant: Apple Inc.

Inventor： Andrew W. Vogan ,  Matthew J. Byom ,  Alexander C. Sanks ,  Daniel J. Post ,  Hari Hara Kumar Maharaj ,  Nir Jacob Wakrat ,  Kenneth L. Herman

IPC: H04L9/08

CPC classification number: G06F21/79 ,  G06F2221/2107

Abstract: Systems and methods are disclosed for generating efficient reads for a system having non-volatile memory (“NVM”). A read command can be separated by a host processor of the system into two phases: a) transmitting a command to a storage processor of the system, where the command is associated with one or more logical addresses, and b) generating data transfer information. The host processor can generate the data transfer information while the storage processor is processing the command from the host processor. Once the data transfer information has been generated and data has been read from the NVM, the data can be transferred.

Abstract translation: 公开了用于为具有非易失性存储器（“NVM”）的系统生成有效读取的系统和方法。 读取命令可以由系统的主机处理器分成两个阶段：a）将命令发送到系统的存储处理器，其中命令与一个或多个逻辑地址相关联，以及b）生成数据传输信息。 主机处理器可以在存储处理器正在处理来自主机处理器的命令时产生数据传输信息。 一旦生成了数据传输信息，并且已经从NVM读取了数据，则可以传送数据。

公开(公告)号：US08806151B2

公开(公告)日：2014-08-12

申请号：US13676729

申请日：2012-11-14

Applicant: Apple Inc.

Inventor： Vadim Khmelnitsky ,  Nir Jacob Wakrat ,  Tahoma Toelkes ,  Daniel Jeffrey Post ,  Anthony Fai

IPC: G06F13/00 ,  G06F13/28 ,  G06F12/02

CPC classification number: G06F12/0246

Abstract: Multipage preparation commands for non-volatile memory systems are disclosed. The multipage preparation commands supply data that can be used to prepare a non-volatile memory device for forthcoming multipage program operations. A host controller can use the commands ahead of a multipage program operation to optimize usage of a multipage program command. The non-volatile memory device can use the commands to configure the non-volatile memory in preparation for a subsequent operation, such as changing a command order or using the most optimized command set for the subsequent operation.

Abstract translation: 公开了用于非易失性存储器系统的多位准备命令。 多功能准备命令提供可用于准备非易失性存储器设备的数据，用于即将进行的多页程序操作。 主机控制器可以使用多页面程序操作之前的命令来优化多页面程序命令的使用。 非易失性存储器件可以使用这些命令来配置非易失性存储器以准备随后的操作，例如改变命令顺序或使用用于后续操作的最优化的命令集。