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公开(公告)号：US09058676B2
公开(公告)日：2015-06-16
申请号：US13850565
申请日：2013-03-26
Applicant: Apple Inc.
Inventor： Brijesh Tripathi , Peter F. Holland , Albert C. Kuo
CPC classification number: G06T1/60 , G06F3/14 , G09G5/001 , G09G5/393 , G09G5/395 , G09G2330/02 , G09G2330/021 , G09G2340/02 , G09G2360/121
Abstract: In an embodiment, a display pipe is configured to composite one or more frames of images and/or video sequences to generate output frames for display. Additionally, the display pipe may be configured to compress an output frame and write the compressed frame to memory responsive to detecting static content in the output frames. The display pipe may also be configured to read the compressed frame from memory for display instead of reading the frames for compositing and display. In some embodiments, the display pipe may include an idle screen detect circuit configured to monitor the operation of the display pipe and/or the output frames to detect the static content.
Abstract translation: 在一个实施例中，显示管被配置为组合一个或多个图像帧和/或视频序列以产生用于显示的输出帧。 此外，显示管可以被配置为响应于检测输出帧中的静态内容而压缩输出帧并将压缩帧写入存储器。 显示管还可以被配置为从存储器读取压缩帧用于显示，而不是读取用于合成和显示的帧。 在一些实施例中，显示管道可以包括被配置为监视显示管道和/或输出框架的操作以检测静态内容的空闲屏幕检测电路。
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公开(公告)号：US20140292788A1
公开(公告)日：2014-10-02
申请号：US13850565
申请日：2013-03-26
Applicant: APPLE INC.
Inventor： Brijesh Tripathi , Peter F. Holland , Albert C. Kuo
IPC: G06T1/60
CPC classification number: G06T1/60 , G06F3/14 , G09G5/001 , G09G5/393 , G09G5/395 , G09G2330/02 , G09G2330/021 , G09G2340/02 , G09G2360/121
Abstract: In an embodiment, a display pipe is configured to composite one or more frames of images and/or video sequences to generate output frames for display. Additionally, the display pipe may be configured to compress an output frame and write the compressed frame to memory responsive to detecting static content in the output frames is detected. The display pipe may also be configured to read the compressed frame from memory for display instead of reading the frames for compositing and display. In some embodiments, the display pipe may include an idle screen detect circuit configured to monitor the operation of the display pipe and/or the output frames to detect the static content.
Abstract translation: 在一个实施例中，显示管被配置为组合一个或多个图像帧和/或视频序列以产生用于显示的输出帧。 此外，显示管可以被配置为压缩输出帧并且响应于检测到输出帧中的静态内容而将压缩帧写入存储器。 显示管还可以被配置为从存储器读取压缩帧用于显示，而不是读取用于合成和显示的帧。 在一些实施例中，显示管道可以包括被配置为监视显示管道和/或输出框架的操作以检测静态内容的空闲屏幕检测电路。
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公开(公告)号：US20140237195A1
公开(公告)日：2014-08-21
申请号：US13771861
申请日：2013-02-20
Applicant: APPLE INC.
Inventor： Peter F. Holland , Hao Chen , Albert C. Kuo
IPC: G06F5/06
CPC classification number: G06F5/10 , G06F2205/106
Abstract: A system and method for efficient dynamic utilization of shared resources. A computing system includes a shared data structure accessed by multiple requestors. Both indications of access requests and indices pointing to entries within the data structure are stored in storage buffers. Each storage buffer maintains at a selected end an oldest stored indication of an access request from a respective requestor. Each storage buffer stores information for the respective requestor in an in-order contiguous manner beginning at the selected end. The indices stored in a given storage buffer are updated responsive to allocating new data or deallocating stored data in the shared data structure. Entries in a storage buffer are deallocated in any order and remaining entries are collapsed toward the selected end to eliminate gaps left by the deallocated entry.
Abstract translation: 一种有效动态利用共享资源的系统和方法。 计算系统包括由多个请求者访问的共享数据结构。 访问请求的指示和指向数据结构内的条目的索引都存储在存储缓冲区中。 每个存储缓冲器在选定的端保持来自相应请求者的最早存储的访问请求的指示。 每个存储缓冲器以从所选择的端开始的按顺序的连续方式存储针对各个请求者的信息。 响应于分配新数据或释放在共享数据结构中存储的数据来更新存储在给定存储缓冲器中的索引。 存储缓冲区中的条目以任何顺序取消分配，剩余条目将朝向选定的端部折叠，以消除已解除分配条目留下的空白。
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公开(公告)号：US20140085320A1
公开(公告)日：2014-03-27
申请号：US13629049
申请日：2012-09-27
Applicant: APPLE INC
Inventor： Peter F. Holland , Hao Chen
CPC classification number: G06F13/1663
Abstract: A system and method for efficiently processing access requests for a shared resource. A computing system includes a shared memory accessed by multiple requestors. Control logic determines two requestors seek to access a same data block within the shared memory. In response to the determination, a first requestor of the two requestors sends a read request to the shared memory on behalf of the two requestors. The second requestor of the two requestors is prevented from sending a read request. In response to detecting data is returned as a response to the read request generated by the first requestor, both the first requestor and the second requestor retrieve the data. In response to detecting a given requestor of the two requestors generates an indication that it is unable to continue retrieving the same response data, the two requestors return to generating separate, respective read requests.
Abstract translation: 一种用于有效地处理共享资源的访问请求的系统和方法。 计算系统包括由多个请求者访问的共享存储器。 控制逻辑确定两个请求者寻求访问共享存储器内的相同数据块。 响应于该确定，两个请求者的第一请求者代表两个请求者向共享存储器发送读请求。 两个请求者的第二请求者被阻止发送读请求。 响应于检测数据作为对由第一请求者产生的读取请求的响应而返回，第一请求者和第二请求者都检索数据。 响应于检测到两个请求者的给定请求者产生不能继续检索相同响应数据的指示，两个请求者返回产生单独的相应读请求。
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公开(公告)号：US20240078946A1
公开(公告)日：2024-03-07
申请号：US18101441
申请日：2023-01-25
Applicant: Apple Inc.
Inventor： Peter F. Holland , Mahesh B. Chappalli
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2300/0819 , G09G2320/0257 , G09G2320/0285 , G09G2360/16
Abstract: This disclosure provide various techniques for reducing the impact of an under-display sensor on an electronic display. Some sensors (e.g., a proximity sensor), when activated, may emit a beam through the electronic display. Emitting the beam through the electronic display may cause pixels to display a different brightness level than intended. To address this, an electronic device may use spatially weighted statistics to determine a timing profile for the under-display sensor to reduce the sensor's interference on the pixels. Additionally, a compensation voltage may be applied to further reduce or eliminate the impacts of the interference.
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Patent Agency Ranking
公开(公告)号：US20230082091A1
公开(公告)日：2023-03-16
申请号：US17934976
申请日：2022-09-23
Applicant: Apple Inc.
Inventor： Ramana V. Rachakonda , Rohit K. Gupta , Brad W. Simeral , Peter F. Holland
IPC: G06F1/3287 , G06F1/3228
Abstract: In an embodiment, a system may include one or more processors forming central processing units (CPUs) in the system, a display controller configured to display frames on a display device, a memory controller configured to control a memory, and a power management circuit. The power management circuit may be configured to establish one of a plurality of power states in the system. In a first power state, the display controller and the memory controller are powered on while the CPUs are powered off. The display controller may be configured to read a plurality of prerendered frames from the memory and display the plurality of prerendered frames at times specified for each of the plurality of prerendered frames.
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公开(公告)号：US20230014545A1
公开(公告)日：2023-01-19
申请号：US17949834
申请日：2022-09-21
Applicant: Apple Inc.
Inventor： Ramana V. Rachakonda , Peter F. Holland , Rohit K. Gupta , Brad W. Simeral
IPC: G06F1/3234 , G09G3/20 , G06F1/3218 , G06F1/18
Abstract: An electronic device may include a display panel. When content of an image frame is expected to consume relatively higher amounts of power, a controller of the electronic device may operate a switch to change a power supply of the display panel to be a power management integrated circuit of the electronic device. However, when content of an image frame is expected to consume relatively less amounts of power, the controller may operate the switch to change the power supply of the display panel to be a power supply of an electronic display, such as a power supply used to power driver circuitry of the electronic display.
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公开(公告)号：US11500448B2
公开(公告)日：2022-11-15
申请号：US17015288
申请日：2020-09-09
Applicant: Apple Inc.
Inventor： Ramana V. Rachakonda , Rohit K. Gupta , Brad W. Simeral , Peter F. Holland
IPC: G06F1/32 , G06F1/3287 , G06F1/3228 , H04B17/318
Abstract: In an embodiment, a system may include one or more processors forming central processing units (CPUs) in the system, a display controller configured to display frames on a display device, a memory controller configured to control a memory, and a power management circuit. The power management circuit may be configured to establish one of a plurality of power states in the system. In a first power state, the display controller and the memory controller are powered on while the CPUs are powered off. The display controller may be configured to read a plurality of prerendered frames from the memory and display the plurality of prerendered frames at times specified for each of the plurality of prerendered frames.
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公开(公告)号：US11361729B2
公开(公告)日：2022-06-14
申请号：US15861215
申请日：2018-01-03
Applicant: Apple Inc.
Inventor： Mahesh B. Chappalli , Christopher P. Tann , Peter F. Holland , Guy Côté , Stephan Lachowsky
Abstract: An electronic display pipeline may process image data for display on an electronic display. The electronic display pipeline may include burn-in compensation statistics collection circuitry and burn-in compensation circuitry. The burn-in compensation statistics collection circuitry may collect image statistics based at least in part on the image data. The statistics may estimate a likely amount of non-uniform aging of the sub-pixels of the electronic display. The burn-in compensation circuitry may apply a gain to sub-pixels of the image data to account for non-uniform aging of corresponding sub-pixels of the electronic display. The applied gain may be based at least in part on the image statistics collected by the burn-in compensation statistics collection circuitry.
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公开(公告)号：US20220084260A1
公开(公告)日：2022-03-17
申请号：US17020705
申请日：2020-09-14
Applicant: Apple Inc.
Inventor： Vincent Z. Young , Can Jin , Mahesh B. Chappalli , Peter F. Holland , Nicolas Pierre Marie Frederi Bonnier
Abstract: An electronic device may include a display panel with pixels that present an image based on image data and an application processor that generates the image data. The electronic device may include a display pipeline coupled to the electronic display and the application processor. The display pipeline may receive first image data from the application processor corresponding to a first color space used by the application processor. The display pipeline may apply a color mapping relationship to the first image data to generate second image data. The color mapping relationship may define a transform to apply to the first image data to generate the second image data corresponding to a second color space used by the electronic display. The display pipeline may transmit the second image data to a display driver that operates the electronic display to emit light according to the second image data.
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