公开(公告)号：US20240254629A1

公开(公告)日：2024-08-01

申请号：US18631858

申请日：2024-04-10

Applicant: ASM IP Holding B.V.

Inventor： Ankit Kimtee ,  Rohan Vijay Rane ,  Herbert Terhorst ,  Eric James Shero ,  Jereld Lee Winkler ,  Michael Schmotzer ,  Shuyang Zhang ,  Todd Robert Dunn ,  Shubham Garg

IPC: C23C16/458 ,  C23C16/46

CPC classification number: C23C16/4586 ,  C23C16/46

Abstract: A susceptor assembly includes a heater pedestal and a cap coupled to the heater pedestal. The cap can include one or mor through holes to facilitate purging and/or reduce dead volumes associated with the susceptor assemblies. Reactor systems including such assemblies are also disclosed.

公开(公告)号：US20240093363A1

公开(公告)日：2024-03-21

申请号：US18522778

申请日：2023-11-29

Applicant: ASM IP Holding B.V.

Inventor： Charles Dezelah ,  Eric James Shero ,  Qi Xie ,  Giuseppe Alessio Verni ,  Petro Deminskyi

IPC: C23C16/455 ,  C23C16/52

CPC classification number: C23C16/45534 ,  C23C16/45553 ,  C23C16/52

Abstract: The current disclosure relates to the manufacture of semiconductor devices, specifically to methods of forming vanadium metal on a substrate. The methods comprise providing a substrate in a reaction chamber, providing a vanadium precursor to the reaction chamber in a vapor phase and providing a reducing agent to the reaction chamber in a vapor phase to form vanadium metal on the substrate. The disclosure further relates to structures and devices formed by the methods, as well as to a deposition assembly.

公开(公告)号：US11926894B2

公开(公告)日：2024-03-12

申请号：US15585540

申请日：2017-05-03

Applicant: ASM IP Holding B.V.

Inventor： Mohith Verghese ,  Eric James Shero ,  Carl Louis White ,  Kyle Fondurulia ,  Herbert Terhorst

IPC: C23C16/44 ,  C23C16/448 ,  C23C16/455

CPC classification number: C23C16/4481 ,  C23C16/45544

Abstract: Herein disclosed are systems and methods related to solid source chemical vaporizer vessels and multiple chamber deposition modules. In some embodiments, a solid source chemical vaporizer includes a housing base and a housing lid. Some embodiments also include a first and second tray configured to be housed within the housing base, wherein each tray defines a first serpentine path adapted to hold solid source chemical and allow gas flow thereover. In some embodiments, a multiple chamber deposition module includes first and second vapor phase reaction chambers and a solid source chemical vaporizer vessel to supply each of the first and second vapor phase reaction chambers.

公开(公告)号：US20230357924A1

公开(公告)日：2023-11-09

申请号：US18141125

申请日：2023-04-28

Applicant: ASM IP Holding B.V.

Inventor： Eric James Shero ,  Charles Dezelah ,  Ren-Jie Chang ,  Qi Xie ,  Perttu Sippola ,  Petri Raisanen

IPC: C23C16/40 ,  C23C16/04 ,  C23C16/44 ,  C23C16/455 ,  H01L21/02 ,  H01L21/768

CPC classification number: C23C16/405 ,  C23C16/045 ,  C23C16/4408 ,  C23C16/45553 ,  H01L21/02175 ,  H01L21/02205 ,  H01L21/0228 ,  H01L21/76831

Abstract: Vapor deposition methods and related systems are provided for depositing layers comprising vanadium and oxygen. In some embodiments, the methods comprise contacting a substrate in a reaction space with alternating pulses of a vapor-phase vanadium precursor and a vapor-phase oxygen reactant. The reaction space may be purged, for example, with an inert gas, between reactant pulses. The methods may be used to fill a gap on a substrate surface. Reaction conditions, including deposition temperature and reactant pulse and purge times may be selected to achieve advantageous gap fill properties. In some embodiments, the substrate on which deposition takes place is maintained at a relatively low temperature, for example between about 50° C. and about 185° C.

公开(公告)号：US20230207377A1

公开(公告)日：2023-06-29

申请号：US18087871

申请日：2022-12-23

Applicant: ASM IP Holding B.V.

Inventor： Rohan Vijay Rane ,  Herbert Terhorst ,  Eric James Shero ,  Ankit Kimtee ,  Jereld Lee Winkler ,  Michael Schmotzer ,  Shuyang Zhang ,  Todd Robert Dunn ,  Shubham Garg

IPC: H01L21/687 ,  C23C16/44

CPC classification number: H01L21/68735 ,  C23C16/4408 ,  H01L21/68785

Abstract: A semiconductor processing device comprises a susceptor assembly comprising a wafer support configured to support a wafer. The wafer support comprises a wafer support body configured to support the wafer, a purge channel extending laterally from an inner portion of the wafer support body to an outer portion of the wafer support body, a first plenum channel disposed at the outer portion of the wafer support and in fluid communication with the purge channel, and an outlet to deliver purge gas to an edge of the wafer, the outlet in fluid communication with the first plenum channel, a purge gas supply hole on a surface opposite to the wafer support body. The purge gas supply hole is in fluid communication with the purge channel, and a plurality of first purge holes fluidly communicated with the first plenum channel and the purge channel.

公开(公告)号：US20230078233A1

公开(公告)日：2023-03-16

申请号：US17989081

申请日：2022-11-17

Applicant: ASM IP Holding B.V.

Inventor： Eric James Shero ,  Michael Eugene Givens ,  Qi Xie ,  Charles Dezelah ,  Giuseppe Alessio Verni

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L27/092

Abstract: Methods and systems for depositing vanadium and/or indium layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium and/or indium layer onto the surface of the substrate. The cyclical deposition process can include providing a vanadium and/or indium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process. Exemplary structures can include field effect transistor structures, such as gate all around structures. The vanadium and/or indium layers can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.

公开(公告)号：US20230042784A1

公开(公告)日：2023-02-09

申请号：US17880090

申请日：2022-08-03

Applicant: ASM IP Holding B.V.

Inventor： Jereld Lee Winkler ,  Eric James Shero

IPC: C23C16/52 ,  C23C16/455 ,  H01L21/67

Abstract: A semiconductor processing system for delivering large capacity vaporized precursor from solid or liquid precursor source is disclosed. The system utilizes a carrier gas to feed the vaporized precursor to a remotely located process zone where multiple process modules are disposed. The system comprises a first and second buffer volumes configured to reduce pressure drop and increase delivery rates. A method for delivering a large capacity vaporized precursor to the remotely located process zone are also disclosed.

公开(公告)号：US20220285147A1

公开(公告)日：2022-09-08

申请号：US17685525

申请日：2022-03-03

Applicant: ASM IP Holding B.V.

Inventor： Lifu Chen ,  Qi Xie ,  Charles Dezelah ,  Petro Deminskyi ,  Giuseppe Alessio Verni ,  Petri Raisanen ,  Eric James Shero

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/52 ,  C23C16/08

Abstract: Disclosed are methods and systems for depositing layers comprising a titanium, aluminum, and carbon. The layers are formed onto a surface of a substrate. The deposition process comprises a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.

公开(公告)号：US20210327715A1

公开(公告)日：2021-10-21

申请号：US17227621

申请日：2021-04-12

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Eric James Shero ,  Charles Dezelah ,  Giuseppe Alessio Verni ,  Petri Raisanen

IPC: H01L21/28 ,  H01L29/49 ,  C23C16/34 ,  C23C16/455 ,  C23C16/52

Abstract: Methods and systems for depositing chromium nitride layers onto a surface of the substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process, depositing a chromium nitride layer onto a surface of the substrate. The deposition process can include providing a chromium precursor to the reaction chamber and separately providing a nitrogen reactant to the reaction chamber. The deposition process may be a thermal cyclical deposition process.

公开(公告)号：US20210242011A1

公开(公告)日：2021-08-05

申请号：US17162279

申请日：2021-01-29

Applicant: ASM IP Holding B.V.

Inventor： Eric James Shero ,  Michael Eugene Givens ,  Qi Xie ,  Charles Dezelah ,  Giuseppe Alessio Verni

IPC: H01L21/02 ,  H01L29/423 ,  H01L27/092 ,  H01L29/06 ,  H01L29/66

Abstract: Methods and systems for depositing vanadium and/or indium layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium and/or indium layer onto the surface of the substrate. The cyclical deposition process can include providing a vanadium and/or indium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process. Exemplary structures can include field effect transistor structures, such as gate all around structures. The vanadium and/or indium layers can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.