公开(公告)号：US06875668B2

公开(公告)日：2005-04-05

申请号：US10179824

申请日：2002-06-24

申请人： Khanh Nguyen ,  Scott Bell

发明人： Khanh Nguyen ,  Scott Bell

IPC分类号： H01L21/28 ,  H01L21/3213 ,  H01L21/336 ,  H01L21/8234

CPC分类号： H01L21/28114 ,  H01L21/32137 ,  H01L21/32139

摘要： Aspects for notched gate structure fabrication are described. The notched gate fabrication includes forming spacers of hard mask material on a gate conductor, and utilizing the spacers during etching to form notches in the gate conductor and provide a notched gate structure. In a further aspect, notched gate fabrication includes performing a timed etch of masked gate conductive material to maintain a portion of a gate conductive layer and provide gate structure areas in the gate conductive layer. Anisotropically etching the gate structure areas provides spacers on the gate structure areas. Isotropically etching the portion of the gate conductive layer provides notched gates in the gate structure areas.

摘要翻译： 描述了切口栅极结构制造的方面。 缺口门制造包括在栅极导体上形成硬掩模材料的间隔物，并且在蚀刻期间利用间隔物在栅极导体中形成凹口并提供缺口栅极结构。 在另一方面，切口栅极制造包括执行掩模栅极导电材料的定时蚀刻以保持栅极导电层的一部分并在栅极导电层中提供栅极结构区域。 栅极结构区域的各向异性蚀刻在栅极结构区域上提供间隔物。 各向同性蚀刻栅极导电层的部分在栅极结构区域中提供有缺口的栅极。

公开(公告)号：US06306710B1

公开(公告)日：2001-10-23

申请号：US09498231

申请日：2000-02-03

申请人： Wei Long ,  Olov Karlsson ,  Bill Liu ,  Scott Bell

发明人： Wei Long ,  Olov Karlsson ,  Bill Liu ,  Scott Bell

IPC分类号： H01L21336

CPC分类号： H01L29/665 ,  H01L21/28035 ,  H01L21/28114 ,  H01L29/4925

摘要： The gate structure of the MOSFET of the present invention is formed to have a longer length toward the top of the gate structure such that a spacer having a substantially rectangular shaped is formed at the sidewalls of the gate structure. For fabricating a gate structure of a field effect transistor on a semiconductor substrate, a layer of gate structure material is deposited on the semiconductor substrate. The composition of the layer of gate structure material is adjusted along a depth of the layer of gate structure material for a slower etch rate toward a top of the layer of gate structure material that is further from the semiconductor substrate. The gate structure is then formed by patterning and etching the layer of gate structure material. The slower etch rate toward the top of the layer of gate structure material results in a longer length toward a top of the gate structure that is further from the semiconductor substrate. Spacer dielectric is deposited conformally on exposed surfaces of the gate structure. The spacer dielectric is anisotropically etched such that the spacer dielectric remains on sidewalls of the gate structure. The longer length toward the top of the gate structure results in a substantially rectangular shaped spacer dielectric remaining on the sidewalls of the gate structure. The present invention may be used to particular advantage when the gate structure and the spacer having the rectangular shape are formed as part of a field effect transistor such as a MOSFET.

摘要翻译： 本发明的MOSFET的栅极结构形成为具有朝向栅极结构的顶部的较长的长度，使得在栅极结构的侧壁处形成具有大致矩形形状的间隔物。 为了在半导体衬底上制造场效应晶体管的栅极结构，在半导体衬底上沉积一层栅极结构材料。 沿着栅极结构材料层的深度调整栅极结构材料层的组成，以便较慢的蚀刻速率朝向离开半导体衬底的栅极结构材料层的顶部。 然后通过对栅极结构材料层进行图案化和蚀刻来形成栅极结构。 朝向栅极结构材料层的顶部的较慢的蚀刻速率导致朝向离开半导体衬底的栅极结构的顶部更长的长度。 间隔电介质保形地沉积在栅极结构的暴露表面上。 间隔电介质被各向异性地蚀刻，使得间隔电介质保留在栅极结构的侧壁上。 朝向栅极结构的顶部的较长的长度导致保留在栅极结构的侧壁上的大致矩形的间隔绝缘体。 当栅极结构和具有矩形形状的间隔物形成为诸如MOSFET的场效应晶体管的一部分时，本发明可以被用于特别的优点。

公开(公告)号：US08202779B2

公开(公告)日：2012-06-19

申请号：US12891310

申请日：2010-09-27

申请人： Shenqing Fang ,  Angela Hui ,  Gang Xue ,  Alexander Nickel ,  Kashmir Sahota ,  Scott Bell ,  Chun Chen ,  Wai Lo

发明人： Shenqing Fang ,  Angela Hui ,  Gang Xue ,  Alexander Nickel ,  Kashmir Sahota ,  Scott Bell ,  Chun Chen ,  Wai Lo

IPC分类号： H01L21/336

CPC分类号： H01L27/11568 ,  H01L21/28282 ,  H01L29/792

摘要： Methods for fabricating a semiconductor memory cell that has a spacer layer are disclosed. A method includes forming a plurality of source/drain regions in a substrate where the plurality of source/drain regions are formed between trenches, forming a first oxide layer above the plurality of source/drain regions and in the trenches, forming a charge storage layer above the oxide layer and separating the charge storage layer in the trenches where a space is formed between separated portions of the charge storage layer. The method further includes forming a spacer layer to fill the space between the separated portions of the charge storage layer and to rise a predetermined distance above the space. A second oxide layer is formed above the charge storage layer and the spacer layer and a polysilicon layer is formed above the second oxide layer.

摘要翻译： 公开了制造具有间隔层的半导体存储单元的方法。 一种方法包括在衬底中形成多个源极/漏极区域，其中多个源极/漏极区域形成在沟槽之间，在多个源极/漏极区域上方和沟槽中形成第一氧化物层，形成电荷存储层 在电荷存储层的分离部分之间，在形成空间的沟槽中分离电荷存储层。 该方法还包括形成间隔层以填充电荷存储层的分离部分之间的空间并在空间上方上升预定距离。 在电荷存储层和间隔层上方形成第二氧化物层，并且在第二氧化物层上方形成多晶硅层。

公开(公告)号：US07465644B1

公开(公告)日：2008-12-16

申请号：US11258209

申请日：2005-10-26

申请人： Simon S. Chan ,  Weidong Qian ,  Scott Bell ,  Phillip Jones ,  Allison Holbrook

发明人： Simon S. Chan ,  Weidong Qian ,  Scott Bell ,  Phillip Jones ,  Allison Holbrook

IPC分类号： H01L21/76

CPC分类号： H01L21/823481 ,  H01L21/76202

摘要： A structure for electrically isolating semiconductor devices includes a semiconducting layer and a layer of aluminum oxide formed in a pattern over the semiconducting layer, where the pattern exposes a portion of the semiconducting layer. The structure further includes an electrical isolation region formed in the exposed portion of the semiconducting layer, where the isolation region does not substantially encroach a region beneath the layer of aluminum oxide.

摘要翻译： 用于电绝缘半导体器件的结构包括半导体层和在半导体层上以图案形成的氧化铝层，其中图案暴露半导体层的一部分。 该结构还包括形成在半导体层的暴露部分中的电隔离区域，其中隔离区域基本上不侵蚀氧化铝层下面的区域。

公开(公告)号：US20060223305A1

公开(公告)日：2006-10-05

申请号：US11098049

申请日：2005-04-04

申请人： Phillip Jones ,  Mark Chang ,  Scott Bell

发明人： Phillip Jones ,  Mark Chang ,  Scott Bell

IPC分类号： H01L21/4763

CPC分类号： H01L21/32139 ,  H01L21/3088 ,  H01L21/31144

摘要： A method of reducing critical dimensions of a feature in a anti-reflective coating layer structure can utilize a polymerizing agent. The anti-reflective coating structure can be utilized to form various integrated circuit structures. The anti-reflective coating can be utilized to form gate stacks comprised of polysilicon and a dielectric layer, conductive lines, or other IC structure. The polymerizing agent can include carbon, hydrogen and fluorine.

摘要翻译： 降低抗反射涂层结构中的特征的关键尺寸的方法可以利用聚合剂。 抗反射涂层结构可用于形成各种集成电路结构。 抗反射涂层可用于形成由多晶硅和电介质层，导电线或其它IC结构组成的栅叠层。 聚合剂可以包括碳，氢和氟。

公开(公告)号：US06642152B1

公开(公告)日：2003-11-04

申请号：US09812206

申请日：2001-03-19

申请人： Che-Hoo Ng ,  Scott Bell ,  Anne Sanderfer ,  Christopher Lee Pike

发明人： Che-Hoo Ng ,  Scott Bell ,  Anne Sanderfer ,  Christopher Lee Pike

IPC分类号： H01L21302

CPC分类号： H01L21/0338 ,  G03F7/40 ,  H01L21/0274 ,  H01L21/0276 ,  H01L21/0337 ,  H01L21/31144

摘要： The present invention relates to a system and a method for reducing the linewidth of ultra thin resist features. The present invention accomplishes this end by applying a densification process to an ultra thin resist having a thickness of less than about 2500 Å formed over a semiconductor structure. In one aspect of the present invention, the method includes providing a semiconductor substrate having a device film layer formed thereon. An ultra thin resist is then deposited over the device film layer. The ultra thin resist is patterned according to a desired structure or feature using conventional photolithography techniques. Following development, the ultra thin resist is implanted with a dopant. After the implantation is substantially completed, the device film layer is anisotropically etched.

摘要翻译： 本发明涉及一种降低超薄抗蚀剂特征的线宽的系统和方法。 本发明通过对在半导体结构上形成的厚度小于约2500埃的超薄抗蚀剂施加致密化工艺来实现这一目的。 在本发明的一个方面，该方法包括提供其上形成有器件膜层的半导体衬底。 然后将超薄抗蚀剂沉积在器件膜层上。 根据期望的结构或特征，使用常规光刻技术将超薄抗蚀剂图案化。 在显影之后，用超声波光刻胶注入掺杂剂。 在基本完成注入之后，将各向异性蚀刻器件膜层。

公开(公告)号：US6121155A

公开(公告)日：2000-09-19

申请号：US205590

申请日：1998-12-04

申请人： Chih-Yuh Yang ,  Scott Bell ,  Qi Xiang

发明人： Chih-Yuh Yang ,  Scott Bell ,  Qi Xiang

IPC分类号： H01L21/308 ,  H01L21/311 ,  H01L21/8238 ,  H01L21/302

CPC分类号： H01L21/82385 ,  H01L21/3088 ,  H01L21/31116

摘要： The present invention provides a process for self-limiting trim etch of patterned photoresist that will allow integrated circuit fabrication to achieve smaller integrated circuit component features and greatly reduce final critical dimension drift or variation. Trim time is set in a plateau region of the critical dimension loss process curve.

摘要翻译： 本发明提供了一种用于图案化光致抗蚀剂的自限制微调蚀刻的方法，其将允许集成电路制造实现更小的集成电路组件特征并大大减少最终临界尺寸漂移或变化。 修剪时间设置在临界尺寸损失过程曲线的平台区域。

公开(公告)号：US20150144658A1

公开(公告)日：2015-05-28

申请号：US14492236

申请日：2014-09-22

申请人： James Bell ,  Scott Bell

发明人： James Bell ,  Scott Bell

IPC分类号： B65D47/24 ,  B65D50/00

CPC分类号： B65D47/242 ,  A45D34/04 ,  B65D47/44 ,  B65D50/00

摘要： A stored liquid dispensing applicator includes a valving arrangement formed of a valve seat and a spring-driven shuttle that is disposed for axial displacement into and out of valve-defining abutment and engagement with the valve seat. The shuttle is displaceable between distal and proximal limits of travel that include a first position defining the distal limit and a second position proximally spaced from the distal limit and distally spaced from the proximal limit. The valve seat is arranged for contact with the shuttle uninterruptedly between the first and second positions to close the valve, and for spaced apart relation with the shuttle between the second position and the proximal limit of travel to open the valve for dispensing of stored liquid. The first position of the shuttle defines an enhanced second level seal, attainable only during manufacture of the device, that is especially resistant to unintended liquid flow or discharge between the valve seat and shuttle. The spring force distally driving the shuttle is sufficient to return the shuttle, from its proximal limit, only to the second position which defines a first level seal of the valving arrangement effective for preventing unintended releases of stored fluid during and between normal usages of the device.

摘要翻译： 存储的液体分配施加器包括由阀座和弹簧驱动梭形成的阀装置，弹簧驱动梭被设置成用于轴向位移进入和离开阀形成的邻接并与阀座接合。 梭子可以在远端和近端行程极限之间移动，其包括限定远端限制的第一位置和与远端限制近端间隔并与远端限制远离的第二位置。 阀座布置成在第一和第二位置之间不间断地与梭子接触以关闭阀，并且与第二位置和行进的近端极限之间的间隔开的关系，以打开用于分配存储的液体的阀。 梭子的第一位置限定了增强的第二级密封件，其仅在制造装置期间可获得，其特别是抵抗在阀座和梭子之间的非预期液体流动或排出。 向远侧驱动梭子的弹簧力足以将梭子从其近端限制返回到第二位置，该第二位置限定了阀装置的第一级密封件，其有效地用于防止在装置的正常使用期间和之间以及在装置的正常使用之间意外释放储存的流体 。

公开(公告)号：US08901720B2

公开(公告)日：2014-12-02

申请号：US13044313

申请日：2011-03-09

申请人： Michael Brennan ,  Scott Bell

发明人： Michael Brennan ,  Scott Bell

IPC分类号： H01L23/58 ,  H01L27/115 ,  H01L21/308 ,  H01L21/033 ,  H01L29/66

CPC分类号： H01L27/115 ,  H01L21/0338 ,  H01L21/3088 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/66795

摘要： A method of forming multiple conductive structures in a semiconductor device includes forming spacers adjacent side surfaces of a mask, where the mask and the spacers are formed on a conductive layer. The method also includes etching at least one trench in a portion of the conductive layer not covered by the spacers or the mask. The method may further include depositing a material over the semiconductor device, removing the mask and etching the conductive layer to remove portions of the conductive layer not covered by the spacers or the material, where remaining portions of the conductive layer form the conductive structures.

摘要翻译： 在半导体器件中形成多个导电结构的方法包括在掩模的侧表面附近形成间隔物，其中掩模和间隔物形成在导电层上。 该方法还包括蚀刻未被间隔物或掩模覆盖的导电层的一部分中的至少一个沟槽。 该方法还可以包括在半导体器件上沉积材料，去除掩模并蚀刻导电层以去除未被间隔物或材料覆盖的导电层的部分，其中导电层的其余部分形成导电结构。

公开(公告)号：US20130250547A1

公开(公告)日：2013-09-26

申请号：US13459807

申请日：2012-04-30

申请人： Cheryl Engstrom ,  Scott Bell

发明人： Cheryl Engstrom ,  Scott Bell

IPC分类号： F21V33/00

CPC分类号： F21V21/03

摘要： A lighting conversion apparatus provided which converts a recessed light into a non-recessed light. A threaded electrical contact is designed to screw into the existing socket of a recessed light. The threaded electrical contact is connected to a socket extension, which is in turn connected to a socket extension base. A canopy is attached to the socket extension base, and fixtures extend from the canopy. The socket extension and socket extension base may telescope allow for shortening of the distance between the canopy and the threaded electrical contact. When installed, the canopy may therefore rest flush with the ceiling surrounding the recessed light hole.

摘要翻译： 一种照明转换装置，其将凹入的光转换成非凹入的光。 螺纹电触点设计成螺丝进入凹入的光的现有插座。 螺纹电触点连接到插座延伸部，插座延伸部又连接到插座延伸基座。 顶盖连接到插座延伸基座上，固定装置从顶盖延伸。 插座延伸座和插座延伸座可望远镜可以缩短遮篷与螺纹电气接触之间的距离。 因此，安装时，顶盖可能与凹陷的光孔周围的天花板齐平。