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    Threshold adjustment using data value balancing in analog memory device
    21.
    发明授权
    Threshold adjustment using data value balancing in analog memory device 有权
    使用模拟存储设备中的数据值平衡进行阈值调整

    公开(公告)号：US09136015B2

    公开(公告)日：2015-09-15

    申请号：US13908041

    申请日：2013-06-03

    Applicant: Apple Inc.

    Inventor： Micha Anholt ,  Eyal Gurgi ,  Barak Baum ,  Moshe Neerman ,  Moti Teitel

    IPC: G11C29/00 ,  G11C29/02 ,  G06F11/10 ,  G11C29/42 ,  G11C11/56 ,  G11C16/00

    CPC classification number: G11C29/021 ,  G06F11/1072 ,  G11C11/56 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/00 ,  G11C29/028 ,  G11C29/42

    Abstract: A method, in a memory including multiple analog memory cells, includes segmenting a group of the memory cells into a common section and at least first and second dedicated sections. Each dedicated section corresponds to a read threshold that is used for reading a data page to be stored in the group. Data to be stored in the group is jointly balanced over a union of the common section and the first dedicated section, and over the union of the common section and the second dedicated section, to create a balanced page such that for each respective read threshold an equal number of memory cells will be programmed to assume programming levels that are separated by the read threshold. The balanced page is stored to the common and dedicated sections, and the read thresholds are adjusted based on detecting imbalance between data values in readout results of the balanced page.

    Abstract translation: 一种在包括多个模拟存储器单元的存储器中的方法包括将一组存储器单元分成公共部分和至少第一和第二专用部分。 每个专用部分对应于用于读取要存储在组中的数据页的读取阈值。 要存储在组中的数据通过公共部分和第一专用部分的并集，并且在公共部分和第二专用部分的联合之间共同平衡，以创建平衡页面，使得对于每个相应的读取阈值 相同数量的存储器单元将被编程为假设由读取阈值分开的编程电平。 平衡页面存储到公共和专用部分，并且基于检测平衡页面的读出结果中的数据值之间的不平衡来调整读取阈值。

    Independent Management of Data and Parity Logical Block Addresses
    24.
    发明申请
    Independent Management of Data and Parity Logical Block Addresses 审中-公开
    数据和奇偶校验逻辑块地址的独立管理

    公开(公告)号：US20140365821A1

    公开(公告)日：2014-12-11

    申请号：US14468527

    申请日：2014-08-26

    Applicant: Apple Inc.

    Inventor： Avraham Poza Meir ,  Oren Golov ,  Naftali Sommer ,  Moshe Neerman

    IPC: G06F11/10

    CPC classification number: G06F11/108 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0688 ,  G06F11/10 ,  G06F11/1068 ,  G06F11/1096 ,  G06F12/0246 ,  G06F12/06 ,  G06F2211/1059 ,  G06F2212/7205

    Abstract: A data storage method includes identifying, in a set of data items associated with respective logical addresses for storage in a memory, a first subset of the logical addresses associated with the data items containing application data, and a second subset of the logical addresses associated with the data items containing parity information that has been calculated over the application data. The data items associated with the first identified subset are stored in one or more first physical memory areas of the memory, and the data items associated with the second identified subset are stored in one or more second physical memory areas of the memory, different from the first physical memory areas. A memory management task is performed independently in the first physical memory areas and in the second physical memory areas.

    Abstract translation: 数据存储方法包括在与存储在存储器中的各个逻辑地址相关联的一组数据项中识别与包含应用数据的数据项相关联的逻辑地址的第一子集，以及与包含应用数据的逻辑地址相关联的第二子集 包含已经通过应用数据计算的奇偶校验信息的数据项。 与第一识别的子集相关联的数据项存储在存储器的一个或多个第一物理存储器区域中，并且与第二识别的子集相关联的数据项存储在存储器的一个或多个第二物理存储器区域中，不同于 第一个物理内存区域。 在第一物理存储器区域和第二物理存储器区域中独立地执行存储器管理任务。

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