摘要:
A case (100) for an electrical device (290) is capable of being placed in an open configuration on a flat surface (180). The case can include: (a) a first panel (110) with a first surface (111) capable of being removably coupled to at least a portion of the electrical device; (b) a second panel (120) with an exterior surface (321) and adjacent to the first panel; and (c) at least one protrusion (215) on the exterior surface of the second panel.
摘要:
The role for a substantially purified human growth factor preparation is shown to contain a distinct polypeptide with apparent M.sub.r on SDS/PAGE of about 220 kD, and to be distinct from bFGF, with a most active fraction at about 220 kD. A human growth factor polypeptide of 157 kD was identified, in human bone marrow aspirates and from bone stromal cells, by immunoblotting with the mAb MS 329, and by affinity isolation using a MS 329 antibody column. A PSA stimulating autocrine factor, PSAF, that is precipitable in ammonium sulfate at between 60-80% saturation is able to induce PSA expression and secretion, and serves as an indicator of androgen independent prostate cell growth.
摘要翻译:显示基本上纯化的人生长因子制剂的作用含有明显的多肽,其在SDS / PAGE上的表观Mr约为220kD,并且与bFGF不同,在大约220kD下具有最高活性分数。 通过用mAb MS 329进行免疫印迹,并通过使用MS 329抗体柱进行亲和分离,在人骨髓抽吸物和骨基质细胞中鉴定了157kD的人生长因子多肽。 在60-80%饱和度的硫酸铵中可沉淀的PSA刺激自分泌因子PSAF能够诱导PSA表达和分泌,并且用作雄激素非依赖性前列腺细胞生长的指标。
摘要:
A new memory checker comprised of a parity checker (51), a bit storage (52), and a parity generator (53), and installed in the memory module (20) of a computer system (10) for checking data error, wherein the parity checker (51) receives the data bus and input parity signal from the computer system (10) to check out error from the data been fetched from the memory module (20) and then to provide an interrupt signal (43) to the computer system (10) upon the checking of an error.
摘要:
The method of testing a memory array of SRAM cells each of which includes memory transistors, bit and bit# lines, precharge circuitry, and an output test terminal involving the steps of connecting selected bit and bit# lines of selected SRAM cells to the output test terminal, disconnecting the memory transistors of the selected SRAM cells from the bit and bit# lines, disconnecting the bit and bit# lines from the precharge circuitry, enabling the column select circuitry to select the columns of the selected SRAM cells, applying a preselected level voltage to the output test terminal, and measuring any current which flows.