公开(公告)号：US09949387B2

公开(公告)日：2018-04-17

申请号：US15038142

申请日：2015-10-19

Applicant: Boe Technology Group Co., Ltd.

Inventor： Jian Xu ,  Xinyin Wu ,  Jianbo Xian

IPC: H05K5/02 ,  H05K5/00

CPC classification number: H05K5/02 ,  G02F2001/133325 ,  H04N5/64 ,  H05K5/0017

Abstract: A display frame structure and a display device belonging to the field of display technology. The structure may alleviate and/or mitigate the problem for the existing display frame structure and display device that the strength will become weak in case of narrow frame design and the active area is reduced. The display frame structure of the embodiment has a side frame formed integrally with the rear housing or detachably connected to the rear housing, the side frame and the plane of the rear housing may form a recess, which may be used for accommodating the display module. The side frame may wrap a side of the display module. Therefore, a fixing structure for this side of the display module is not required, the design for the front frame may be omitted, and a narrow frame design for the display device may be achieved.

公开(公告)号：US09915846B2

公开(公告)日：2018-03-13

申请号：US14913259

申请日：2015-08-20

Applicant: Boe Technology Group Co., Ltd.

Inventor： Hongfei Cheng ,  Jianbo Xian ,  Yongda Ma ,  Xingchen Shangguan

IPC: H01L27/146 ,  G02F1/1362 ,  G02F1/1343 ,  H01L27/12

CPC classification number: G02F1/136286 ,  G02F1/134309 ,  G02F1/1362 ,  G02F2201/121 ,  G02F2201/123 ,  H01L27/124

Abstract: An array substrate and a display device belonging to the field of display technology. The array substrate comprises a plurality of gate lines, a plurality of data lines which intersect the plurality of gate lines, and a plurality of pixels units comprised of electrodes defined by neighboring gate lines and neighboring data lines. The array substrate includes a plurality of common electrode lines extending in a gate line direction. Each of the common electrode lines comprises a plurality of branches extending in a data line direction. The array substrate can shield an electric field formed between the data lines and the pixel electrodes, so that a problem of light leakage in the array substrate is solved.

公开(公告)号：US20170307949A1

公开(公告)日：2017-10-26

申请号：US15521503

申请日：2016-10-11

Applicant: Boe Technology Group Co., Ltd.

Inventor： Hongfei Cheng ,  Jianbo Xian

IPC: G02F1/1362 ,  G02F1/1368 ,  G02F1/136 ,  H01L27/12

CPC classification number: G02F1/136286 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/13606 ,  G02F2201/123 ,  H01L27/124

Abstract: An array substrate and a display device is disclosed. The array substrate includes a base substrate, a plurality of gate lines and a plurality of data lines arranged to intersect each other on the base substrate, a pixel electrode arranged in a region defined by an adjacent gate line and an adjacent data line, and a thin film transistor arranged at an intersection of the gate lines and the data lines. A drain of the thin film transistor is connected with the pixel electrode through a via hole. The gate lines further include a widening portion between adjacent data lines. The widening portion comprises a recess structure. An orthogonal projection of the recess structure on the base substrate at least partly overlaps that of the drain of the thin film transistor on the base substrate.

公开(公告)号：US09773819B2

公开(公告)日：2017-09-26

申请号：US14769405

申请日：2014-11-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hongfei Cheng ,  Yong Qiao ,  Jianbo Xian ,  Wenbo Li ,  Pan Li

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1333 ,  G02F1/1368 ,  H01L29/66 ,  H01L29/786 ,  G02F1/1343

CPC classification number: H01L27/124 ,  G02F1/133345 ,  G02F1/1343 ,  G02F1/134309 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/1362 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134318 ,  G02F2001/134345 ,  G02F2001/134372 ,  G02F2001/136218 ,  G02F2001/136295 ,  G02F2201/121 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1259 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78669 ,  H01L29/7869

Abstract: The present disclosure provides an array substrate, a display panel, a display device and a method for manufacturing the array substrate. The array substrate includes: a plurality of gate lines and a plurality of data lines arranged in a crisscross manner on a base substrate, so as to define a plurality of subpixels; and a common electrode arranged opposite to each of the plurality of subpixels. At least one of the subpixels is provided with a common electrode line connected to the common electrode at an identical subpixel region.

公开(公告)号：US09756752B2

公开(公告)日：2017-09-05

申请号：US14784623

申请日：2015-03-13

Applicant: Boe Technology Group Co., Ltd.

Inventor： Yongda Ma ,  Jianbo Xian

IPC: H05K9/00 ,  H05K7/14 ,  H05K3/00

CPC classification number: H05K7/1405 ,  H05K3/00 ,  H05K7/1417 ,  H05K7/142

Abstract: The present application discloses a circuit board positioning device, comprising: a beam, a first side of the beam forming a circuit board supporting surface, and the first side being provided with a first fixture block and a second fixture block, a first positioning slot being formed on the first fixture block, a second positioning slot being formed on the second fixture block, the first positioning slot and the second positioning slot being used for limiting positions of two opposite side edges in the circuit board; a snap-fit, one end of the snap-fit being rotatablely mounted on the beam around one end of the beam; a lock mechanism being provided between the snap-fit and the beam for locking the snap-fit and the beam when the snap-fit is in a closed position, and a side of the snap-fit facing towards the beam being provided with at least one elastic pressing sheet protruding towards the beam when being in the closed position. The circuit board positioning device can protect the circuit board from being damaged when shock occurs.

公开(公告)号：US09612495B2

公开(公告)日：2017-04-04

申请号：US14435923

申请日：2014-09-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hongfei Cheng ,  Yong Qiao ,  Jianbo Xian ,  Wenbo Li ,  Pan Li

IPC: G09G3/36 ,  G02F1/1362 ,  G02F1/1343 ,  G02F1/1368 ,  H01L27/12

CPC classification number: G02F1/136286 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136213 ,  G02F1/1368 ,  G02F2001/136218 ,  H01L27/124

Abstract: An array substrate and a display device are provided. A common electrode line with the same extending direction as a gate line is disposed at one end near a thin film transistor, and forms a storage capacitor with a drain electrode of the thin film transistor. As compared with the case in the prior art that a common electrode line and a thin film transistor in an array substrate are disposed at both ends of a pixel, respectively, and it is necessary to separately provide a storage capacitance electrode useful for forming a storage capacitor with the common electrode line, the pixel region occupied by the thin film transistor and the common electrode line can be effectively decreased. Thus, the aperture ratio is increased, and the display brightness of an IPS liquid crystal display device is enhanced.

公开(公告)号：US20170038654A1

公开(公告)日：2017-02-09

申请号：US14907079

申请日：2015-08-20

Applicant: Boe Technology Group Co. Ltd.

Inventor： Honggei Cheng ,  Jianbo Xian ,  Jain Xu

IPC: G02F1/1362 ,  G02F1/1343 ,  H01L27/12 ,  G02F1/1333

CPC classification number: G02F1/136286 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/134363 ,  G02F1/1362 ,  G02F1/136213 ,  G02F1/1368 ,  G02F2001/134318 ,  G02F2001/13606 ,  G02F2201/121 ,  G02F2201/123 ,  H01L23/50 ,  H01L27/02 ,  H01L27/124 ,  H01L27/1288

Abstract: An array substrate and a display device. The array substrate comprises a common electrode line a plurality of gate lines and a plurality of data lines which intersect with each other and pixel units defined by neighboring in data lines. A storage electrode line is provided, so that storage capacitance between the storage electrode line and the pixel electrode can compensate storage capacitance formed between the common electrode and the pixel electrode. The ability of charge retention of the pixel electrode can be increased, so that voltage of the pixel electrode is constant during display period of a frame, and the display effect of a picture is ensured.

Abstract translation: 阵列基板和显示装置。 阵列基板包括公共电极线，多条栅极线和彼此相交的多条数据线以及由相邻的数据线限定的像素单元。 提供存储电极线，使得存储电极线和像素电极之间的存储电容可以补偿在公共电极和像素电极之间形成的存储电容。 可以增加像素电极的电荷保持能力，使得像素电极的电压在帧的显示期间是恒定的，并且确保了图像的显示效果。

公开(公告)号：US20160357075A1

公开(公告)日：2016-12-08

申请号：US14892316

申请日：2015-04-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jianbo Xian ,  Yong Qiao ,  Hongfei Cheng

IPC: G02F1/1343 ,  G02F1/1368

CPC classification number: G02F1/134336 ,  G02F1/1343 ,  G02F1/134309 ,  G02F1/1368

Abstract: The embodiments of the present invention provide an array substrate and a display device, which can reduce the phenomenon of point discharge for the pixel electrode. The array substrate comprises a plurality of pixel units; a pixel electrode is provided in each pixel unit; wherein at least one corner of at least one pixel electrode is provided with a notch.

Abstract translation: 本发明的实施例提供了可以减少像素电极的点放电现象的阵列基板和显示装置。 阵列基板包括多个像素单元; 在每个像素单元中设置像素电极; 其中至少一个像素电极的至少一个角部设置有凹口。

公开(公告)号：US09419019B2

公开(公告)日：2016-08-16

申请号：US14482686

申请日：2014-09-10

Applicant: BOE TECHNOLOGY GROUP CO., LTD

Inventor： Hongfei Cheng ,  Yong Qiao ,  Jianbo Xian ,  Wenbo Li ,  Pan Li

IPC: H01L21/28 ,  H01L27/12

CPC classification number: H01L27/1222 ,  H01L27/124

Abstract: An array substrate and a display device is disclosed, for eliminating the interference of transient electromagnetic signals caused by the time-varying voltages on the gate lines and the data lines with the voltages on the pixel electrodes. The array substrate comprises gate lines and data lines disposed on a substrate, and pixel units surrounded and separated by the gate lines and the data lines; and the array substrate further comprises shielding electrodes disposed above at least one of the gate lines and the data lines to cover at least part of the at least one and electrically insulated from the gate lines and the data lines.

Abstract translation: 公开了阵列基板和显示装置，用于消除由栅极线和数据线上的时变电压引起的瞬时电磁信号与像素电极上的电压的干扰。 阵列基板包括设置在基板上的栅极线和数据线，以及由栅极线和数据线包围和分离的像素单元; 并且阵列基板还包括设置在至少一个栅极线和数据线之上的屏蔽电极，以覆盖至少一个并且与栅极线和数据线电绝缘的至少一部分。

公开(公告)号：US20250164842A1

公开(公告)日：2025-05-22

申请号：US19028480

申请日：2025-01-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Binbin Tong ,  Lizhong Wang ,  Jianbo Xian ,  Liping Lei ,  Chunping Long ,  Yunping Di ,  Ce Ning

IPC: G02F1/1362 ,  G02F1/01 ,  G02F1/1333 ,  G02F1/1339 ,  G02F1/1343

Abstract: A display panel is disclosed. In the display panel, the second electrode is electrically connected to the first electrode through the first via hole, and a first support structure is provided in a region corresponding to the first via hole; and at least a part of the first support structure is located in the first via hole, and an orthographic projection of the first via hole on the base substrate at least partially overlaps with an orthographic projection of the gate line on the base substrate, the first support structure extends upward within the first via hole to an upper opening region of the first via hole, and a top of the first support structure is higher than the upper surface of the first interlayer insulating layer, a surface of the first support structure close to the second substrate is a curved surface.