公开(公告)号：US20140054656A1

公开(公告)日：2014-02-27

申请号：US13594296

申请日：2012-08-24

申请人： Chieh-Chih Chen ,  Cheng-Chi Lin ,  Shih-Chin Lien ,  Shyi-Yuan Wu

发明人： Chieh-Chih Chen ,  Cheng-Chi Lin ,  Shih-Chin Lien ,  Shyi-Yuan Wu

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L27/088 ,  H01L21/761 ,  H01L21/823418 ,  H01L21/823481 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/7816

摘要： A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a device region, a first doped region and a gate structure. The first doped region is formed in the substrate adjacent to the device region. The gate structure is on the first doped region. The first doped region is overlapped the gate structure.

摘要翻译： 提供半导体结构及其制造方法。 半导体结构包括衬底，器件区域，第一掺杂区域和栅极结构。 第一掺杂区域形成在与器件区域相邻的衬底中。 栅极结构在第一掺杂区域上。 第一掺杂区域与栅极结构重叠。

公开(公告)号：US20130020680A1

公开(公告)日：2013-01-24

申请号：US13185948

申请日：2011-07-19

申请人： Chieh-Chih Chen ,  Cheng-Chi Lin ,  Shih-Chin Lien ,  Shyi-Yuan Wu

发明人： Chieh-Chih Chen ,  Cheng-Chi Lin ,  Shih-Chin Lien ,  Shyi-Yuan Wu

IPC分类号： H01L29/866 ,  H01L21/22

CPC分类号： H01L29/66106 ,  H01L27/0629 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/1083 ,  H01L29/36 ,  H01L29/7835 ,  H01L29/866

摘要： A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a diode. The diode comprises a first doped region, a second doped region and a third doped region. The first doped region and the third doped region have a first conductivity type. The second doped region has a second conductivity type opposite to the first conductivity type. The second doped region and the third doped region are separated from each other by the first doped region. The third doped region has a first portion and a second portion adjacent to each other. The first portion and the second portion are respectively adjacent to and away from the second doped region. A dopant concentration of the first portion is bigger than a dopant concentration of the second portion.

摘要翻译： 提供半导体结构及其制造方法。 半导体结构包括二极管。 二极管包括第一掺杂区，第二掺杂区和第三掺杂区。 第一掺杂区域和第三掺杂区域具有第一导电类型。 第二掺杂区具有与第一导电类型相反的第二导电类型。 第二掺杂区域和第三掺杂区域通过第一掺杂区域彼此分离。 第三掺杂区域具有彼此相邻的第一部分和第二部分。 第一部分和第二部分分别与第二掺杂区域相邻并远离第二掺杂区域。 第一部分的掺杂剂浓度大于第二部分的掺杂剂浓度。

公开(公告)号：US20120280316A1

公开(公告)日：2012-11-08

申请号：US13101486

申请日：2011-05-05

申请人： Chen-Yuan Lin ,  Cheng-Chi Lin ,  Shih-Chin Lien ,  Shyi-Yuan Wu

发明人： Chen-Yuan Lin ,  Cheng-Chi Lin ,  Shih-Chin Lien ,  Shyi-Yuan Wu

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/0684 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1087 ,  H01L29/42368 ,  H01L29/66689 ,  H01L29/7393 ,  H01L29/7816 ,  H01L29/861

摘要： A semiconductor structure and a manufacturing method for the same are provided. The semiconductor structure includes a first doped well, a first doped electrode, a second doped electrode, doped strips and a doped top region. The doped strips are on the first doped well between the first doped electrode and the second doped electrode. The doped strips are separated from each other. The doped top region is on the doped strips and extended on the first doped well between the doped strips. The first doped well and the doped top region have a first conductivity type. The doped strips have a second conductivity type opposite to the first conductivity type.

摘要翻译： 提供了一种半导体结构及其制造方法。 半导体结构包括第一掺杂阱，第一掺杂电极，第二掺杂电极，掺杂条和掺杂顶区。 掺杂条在第一掺杂电极和第二掺杂电极之间的第一掺杂阱上。 掺杂的条带彼此分离。 掺杂的顶部区域在掺杂的条带上并且在掺杂条带之间的第一掺杂阱上延伸。 第一掺杂阱和掺杂顶区具有第一导电类型。 掺杂的条带具有与第一导电类型相反的第二导电类型。

公开(公告)号：US20110140201A1

公开(公告)日：2011-06-16

申请号：US12775440

申请日：2010-05-06

申请人： Cheng-Chi Lin ,  Chen-Yuan Lin ,  Shih-Chin Lien ,  Shyi-Yuan Wu

发明人： Cheng-Chi Lin ,  Chen-Yuan Lin ,  Shih-Chin Lien ,  Shyi-Yuan Wu

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7816 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1087 ,  H01L29/42368 ,  H01L29/66689

摘要： A lateral power MOSFET with a low specific on-resistance is described. Stacked P-top and N-grade regions in patterns of articulated circular arcs separate the source and drain of the transistor.

摘要翻译： 描述具有低比导通电阻的横向功率MOSFET。 铰接圆弧形图案中堆叠的P顶和N级区分离晶体管的源极和漏极。

公开(公告)号：US20120025352A1

公开(公告)日：2012-02-02

申请号：US12847467

申请日：2010-07-30

申请人： Cheng-Chi Lin ,  Wei-Hsun Hsu ,  Shuo-Lun Tu ,  Shih-Chin Lien ,  Chin-Pen Yeh

发明人： Cheng-Chi Lin ,  Wei-Hsun Hsu ,  Shuo-Lun Tu ,  Shih-Chin Lien ,  Chin-Pen Yeh

IPC分类号： H01L29/73

CPC分类号： H01L29/7322 ,  H01L29/0692

摘要： A bipolar junction transistor (BJT) device including a base region, an emitter region and a collector region comprises a substrate, a deep well region in the substrate, a first well region in the deep well region to serve as the base region, a second well region in the deep well region to serve as the collector region, the second well region and the first well region forming a first junction therebetween, and a first doped region in the first well region to serve as the emitter region, the first doped region and the first well region forming a second junction therebetween, wherein the first doped region includes a first section extending in a first direction and a second section extending in a second direction different from the first direction, the first section and the second section being coupled with each other.

摘要翻译： 包括基极区域，发射极区域和集电极区域的双极结型晶体管（BJT）器件包括衬底，衬底中的深阱区域，深阱区域中用作基极区域的第一阱区域，第二 阱区域作为集电极区域，第二阱区域和第一阱区域在其间形成第一接合部，第一阱区域中的第一掺杂区域用作发射极区域，第一掺杂区域 并且所述第一阱区域在其间形成第二结，其中所述第一掺杂区域包括沿第一方向延伸的第一部分和沿与所述第一方向不同的第二方向延伸的第二部分，所述第一部分和所述第二部分与 彼此。

公开(公告)号：US20070108520A1

公开(公告)日：2007-05-17

申请号：US11399427

申请日：2006-04-07

申请人： Cheng-Chi Lin ,  Shin Su ,  Chien-Wen Chu ,  Shih-Chin Lien ,  Chin-Pen Yeh

发明人： Cheng-Chi Lin ,  Shin Su ,  Chien-Wen Chu ,  Shih-Chin Lien ,  Chin-Pen Yeh

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/00

CPC分类号： H01L29/0847 ,  H01L29/086 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/4933 ,  H01L29/66659 ,  H01L29/7816 ,  H01L29/7835

摘要： The present invention discloses a laterally double-diffused metal oxide semiconductor transistor (LDMOS) and a method for fabricating the same. The LDMOS includes a substrate, a first well, a drain, a second well and a source. The substrate includes a first conductive dopant. The first well includes a second conductive dopant and formed in a part of the substrate, and the drain is located in the first well. The second well includes the first conductive dopant and formed in another part of the substrate, and the source located in the second well. The source includes a lightly doped region and a heavily doped region extending downwardly from a top surface of the substrate. The depth of the lightly doped region is more than the depth of the heavily doped region.

摘要翻译： 本发明公开了一种横向双扩散金属氧化物半导体晶体管（LDMOS）及其制造方法。 LDMOS包括衬底，第一阱，漏极，第二阱和源极。 衬底包括第一导电掺杂剂。 第一阱包括第二导电掺杂剂并形成在衬底的一部分中，并且漏极位于第一阱中。 第二阱包括第一导电掺杂剂并且形成在衬底的另一部分中，并且源位于第二阱中。 源包括从衬底的顶表面向下延伸的轻掺杂区域和重掺杂区域。 轻掺杂区域的深度大于重掺杂区域的深度。

公开(公告)号：US08319315B2

公开(公告)日：2012-11-27

申请号：US12847467

申请日：2010-07-30

申请人： Cheng-Chi Lin ,  Wei-Hsun Hsu ,  Shuo-Lun Tu ,  Shih-Chin Lien ,  Chin-Pen Yeh

发明人： Cheng-Chi Lin ,  Wei-Hsun Hsu ,  Shuo-Lun Tu ,  Shih-Chin Lien ,  Chin-Pen Yeh

IPC分类号： H01L21/02 ,  H01L29/66

CPC分类号： H01L29/7322 ,  H01L29/0692

摘要： A bipolar junction transistor (BJT) device including a base region, an emitter region and a collector region comprises a substrate, a deep well region in the substrate, a first well region in the deep well region to serve as the base region, a second well region in the deep well region to serve as the collector region, the second well region and the first well region forming a first junction therebetween, and a first doped region in the first well region to serve as the emitter region, the first doped region and the first well region forming a second junction therebetween, wherein the first doped region includes a first section extending in a first direction and a second section extending in a second direction different from the first direction, the first section and the second section being coupled with each other.

摘要翻译： 包括基极区域，发射极区域和集电极区域的双极结型晶体管（BJT）器件包括衬底，衬底中的深阱区域，深阱区域中用作基极区域的第一阱区域，第二 阱区域作为集电极区域，第二阱区域和第一阱区域在其间形成第一接合部，第一阱区域中的第一掺杂区域用作发射极区域，第一掺杂区域 并且所述第一阱区域在其间形成第二结，其中所述第一掺杂区域包括沿第一方向延伸的第一部分和沿与所述第一方向不同的第二方向延伸的第二部分，所述第一部分和所述第二部分与 彼此。

公开(公告)号：US20120292740A1

公开(公告)日：2012-11-22

申请号：US13111563

申请日：2011-05-19

申请人： Chen-Yuan Lin ,  Cheng-Chi Lin ,  Shih-Chin Lien ,  Chin-Pen Yeh

发明人： Chen-Yuan Lin ,  Cheng-Chi Lin ,  Shih-Chin Lien ,  Chin-Pen Yeh

IPC分类号： H01L29/02 ,  H01L21/02

CPC分类号： H01L28/20 ,  H01L27/0676 ,  H01L27/0802 ,  H01L29/0692 ,  H01L29/8605

摘要： A semiconductor device comprises a semiconductor substrate, a lateral semiconductor diode, a field insulation structure, and a polysilicon resistor. The diode is formed in a surface region of the semiconductor substrate, and includes a cathode electrode and an anode electrode. The field insulation structure is disposed between the cathode and anode electrodes. The polysilicon resistor is formed over the field insulation structure, and between the cathode and anode electrodes. The polysilicon resistor is electrically connected to the cathode electrode, and electrically insulated from the anode electrode.

摘要翻译： 半导体器件包括半导体衬底，横向半导体二极管，场绝缘结构和多晶硅电阻器。 二极管形成在半导体衬底的表面区域中，并且包括阴极电极和阳极电极。 场绝缘结构设置在阴极和阳极之间。 多晶硅电阻器形成在场绝缘结构之上，并且在阴极和阳极之间。 多晶硅电阻器电连接到阴极电极，并与阳极电极电绝缘。

公开(公告)号：US07829408B2

公开(公告)日：2010-11-09

申请号：US12429951

申请日：2009-04-24

申请人： Cheng-Chi Lin ,  Shin Su ,  Chien-Wen Chu ,  Shih-Chin Lien ,  Chin-Pen Yeh

发明人： Cheng-Chi Lin ,  Shin Su ,  Chien-Wen Chu ,  Shih-Chin Lien ,  Chin-Pen Yeh

IPC分类号： H01L21/8238

CPC分类号： H01L29/0847 ,  H01L29/086 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/4933 ,  H01L29/66659 ,  H01L29/7816 ,  H01L29/7835

摘要： The present invention discloses a laterally double-diffused metal oxide semiconductor transistor (LDMOS) and a method for fabricating the same. The LDMOS includes a substrate, a first well, a drain, a second well and a source. The substrate includes a first conductive dopant. The first well includes a second conductive dopant and formed in a part of the substrate, and the drain is located in the first well. The second well includes the first conductive dopant and formed in another part of the substrate, and the source located in the second well. The source includes a lightly doped region and a heavily doped region extending downwardly from a top surface of the substrate. The depth of the lightly doped region is more than the depth of the heavily doped region.

摘要翻译： 本发明公开了一种横向双扩散金属氧化物半导体晶体管（LDMOS）及其制造方法。 LDMOS包括衬底，第一阱，漏极，第二阱和源极。 衬底包括第一导电掺杂剂。 第一阱包括第二导电掺杂剂并形成在衬底的一部分中，并且漏极位于第一阱中。 第二阱包括第一导电掺杂剂并且形成在衬底的另一部分中，并且源位于第二阱中。 源包括从衬底的顶表面向下延伸的轻掺杂区域和重掺杂区域。 轻掺杂区域的深度大于重掺杂区域的深度。

公开(公告)号：US07525153B2

公开(公告)日：2009-04-28

申请号：US11399427

申请日：2006-04-07

申请人： Cheng-Chi Lin ,  Shin Su ,  Chien-Wen Chu ,  Shih-Chin Lien ,  Chin-Pen Yeh

发明人： Cheng-Chi Lin ,  Shin Su ,  Chien-Wen Chu ,  Shih-Chin Lien ,  Chin-Pen Yeh

IPC分类号： H01L29/94

CPC分类号： H01L29/0847 ,  H01L29/086 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/4933 ,  H01L29/66659 ,  H01L29/7816 ,  H01L29/7835

摘要： The present invention discloses a laterally double-diffused metal oxide semiconductor transistor (LDMOS) and a method for fabricating the same. The LDMOS includes a substrate, a first well, a drain, a second well and a source. The substrate includes a first conductive dopant. The first well includes a second conductive dopant and formed in a part of the substrate, and the drain is located in the first well. The second well includes the first conductive dopant and formed in another part of the substrate, and the source located in the second well. The source includes a lightly doped region and a heavily doped region extending downwardly from a top surface of the substrate. The depth of the lightly doped region is more than the depth of the heavily doped region.

摘要翻译： 本发明公开了一种横向双扩散金属氧化物半导体晶体管（LDMOS）及其制造方法。 LDMOS包括衬底，第一阱，漏极，第二阱和源极。 衬底包括第一导电掺杂剂。 第一阱包括第二导电掺杂剂并形成在衬底的一部分中，并且漏极位于第一阱中。 第二阱包括第一导电掺杂剂并且形成在衬底的另一部分中，并且源位于第二阱中。 源包括从衬底的顶表面向下延伸的轻掺杂区域和重掺杂区域。 轻掺杂区域的深度大于重掺杂区域的深度。