公开(公告)号：US08405212B2

公开(公告)日：2013-03-26

申请号：US12818422

申请日：2010-06-18

Applicant: Chi-Chih Chu ,  Cheng-Yi Weng

Inventor： Chi-Chih Chu ,  Cheng-Yi Weng

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention relates to a semiconductor package. The semiconductor package includes a substrate, at least one chip, a plurality of conductive elements, a plurality of first conductors and a molding compound. The substrate has a plurality of first pads and a solder mask. The first pads are exposed to a first surface of the substrate, and the material of the first pads is copper. The solder mask is disposed on the first surface, contacts the first pads directly, and has at least one opening so as to expose part of the first pads. The chip is mounted on the first surface of the substrate. The conductive elements electrically connect the chip and the substrate. The first conductors are disposed on the first pads. The molding compound is disposed on the first surface of the substrate, and encapsulates the chip, the conductive elements and part of the first conductors. Whereby, the solder mask contacts the first pads directly, and thus results in higher bonding strength, so as to avoid the bridge between the first conductors caused by the first conductors permeating into the interface between the solder mask and the first pads.

Abstract translation: 本发明涉及半导体封装。 半导体封装包括衬底，至少一个芯片，多个导电元件，多个第一导体和模制化合物。 基板具有多个第一焊盘和焊接掩模。 第一焊盘暴露于衬底的第一表面，并且第一焊盘的材料是铜。 焊接掩模设置在第一表面上，直接接触第一焊盘，并且具有至少一个开口以暴露第一焊盘的部分。 芯片安装在基板的第一表面上。 导电元件电连接芯片和基板。 第一导体设置在第一焊盘上。 模塑料配置在基板的第一表面上，并封装芯片，导电元件和第一导体的一部分。 由此，焊接掩模直接接触第一焊盘，从而导致更高的焊接强度，以避免第一导体之间由第一导体渗入焊料掩模和第一焊盘之间的界面引起的桥。

公开(公告)号：US08076765B2

公开(公告)日：2011-12-13

申请号：US12507305

申请日：2009-07-22

Applicant: Kuang-Hsiung Chen ,  Chi-Chih Shen ,  Jen-Chuan Chen ,  Wen-Hsiung Chang ,  Hui-Shan Chang ,  Pei-Yu Hsu ,  Fa-Hao Wu ,  Chen-Yu Chia ,  Chi-Chih Chu ,  Cheng-Yi Weng ,  Ya-Wen Hsu

Inventor： Kuang-Hsiung Chen ,  Chi-Chih Shen ,  Jen-Chuan Chen ,  Wen-Hsiung Chang ,  Hui-Shan Chang ,  Pei-Yu Hsu ,  Fa-Hao Wu ,  Chen-Yu Chia ,  Chi-Chih Chu ,  Cheng-Yi Weng ,  Ya-Wen Hsu

IPC: H01L21/44 ,  H01L21/302 ,  H01L21/461

CPC classification number: H01L23/3128 ,  H01L21/565 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) connecting elements disposed adjacent to a periphery of the substrate unit and extending upwardly from an upper surface of the substrate unit; (3) a semiconductor device disposed adjacent to the upper surface of the substrate unit and electrically connected to the substrate unit; and (4) a package body disposed adjacent to the upper surface of the substrate unit and covering the semiconductor device. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit. The package body defines openings that at least partially expose respective ones of the connecting elements. At least one of the connecting elements has a width WC, and at least one of the openings has a width WU adjacent to an upper surface of the package body, such that WU>WC.

Abstract translation: 在一个实施例中，半导体器件封装包括：（1）衬底单元; （2）连接元件，其邻近所述基板单元的周边设置并从所述基板单元的上表面向上延伸; （3）半导体器件，与所述衬底单元的上表面相邻并且电连接到所述衬底单元; 和（4）与衬底单元的上表面相邻并且覆盖半导体器件的封装体。 封装主体的侧表面基本上与衬底单元的侧表面对准。 包装体限定了至少部分地暴露相应的连接元件的开口。 连接元件中的至少一个具有宽度WC，并且至少一个开口具有与封装主体的上表面相邻的宽度WU，使得WU> WC。

公开(公告)号：US20110156251A1

公开(公告)日：2011-06-30

申请号：US12818422

申请日：2010-06-18

Applicant: Chi-Chih Chu ,  Cheng-Yi Weng

Inventor： Chi-Chih Chu ,  Cheng-Yi Weng

IPC: H01L23/485

CPC classification number: H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention relates to a semiconductor package. The semiconductor package includes a substrate, at least one chip, a plurality of conductive elements, a plurality of first conductors and a molding compound. The substrate has a plurality of first pads and a solder mask. The first pads are exposed to a first surface of the substrate, and the material of the first pads is copper. The solder mask is disposed on the first surface, contacts the first pads directly, and has at least one opening so as to expose part of the first pads. The chip is mounted on the first surface of the substrate. The conductive elements electrically connect the chip and the substrate. The first conductors are disposed on the first pads. The molding compound is disposed on the first surface of the substrate, and encapsulates the chip, the conductive elements and part of the first conductors. Whereby, the solder mask contacts the first pads directly, and thus results in higher bonding strength, so as to avoid the bridge between the first conductors caused by the first conductors permeating into the interface between the solder mask and the first pads.

Abstract translation: 本发明涉及半导体封装。 半导体封装包括衬底，至少一个芯片，多个导电元件，多个第一导体和模制化合物。 基板具有多个第一焊盘和焊接掩模。 第一焊盘暴露于衬底的第一表面，并且第一焊盘的材料是铜。 焊接掩模设置在第一表面上，直接接触第一焊盘，并且具有至少一个开口以暴露第一焊盘的部分。 芯片安装在基板的第一表面上。 导电元件电连接芯片和基板。 第一导体设置在第一焊盘上。 模塑料配置在基板的第一表面上，并封装芯片，导电元件和第一导体的一部分。 由此，焊接掩模直接接触第一焊盘，从而导致更高的焊接强度，以避免第一导体之间由第一导体渗入焊料掩模和第一焊盘之间的界面引起的桥。

公开(公告)号：US20080073769A1

公开(公告)日：2008-03-27

申请号：US11828351

申请日：2007-07-26

Applicant: Yen-Yi Wu ,  Wei-Yueh Sung ,  Pao-Huei Chang Chien ,  Chi-Chih Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng

Inventor： Yen-Yi Wu ,  Wei-Yueh Sung ,  Pao-Huei Chang Chien ,  Chi-Chih Chu ,  Cheng-Yin Lee ,  Gwo-Liang Weng

IPC: H01L23/02 ,  H01L23/52

CPC classification number: H01L24/14 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/1405 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.

Abstract translation: 本发明涉及半导体封装和半导体器件及其制造方法。 制造半导体封装的方法包括：提供衬底; 将芯片附接到所述基板的表面; 形成用于电连接所述芯片和所述基板的多个连接元件; 在所述基板的表面上形成多个第一导电体; 形成用于封装基板，芯片，连接元件和第一导电体的表面的模塑料; 并且除去模塑料的边界部分的一部分，使得模塑料具有两个高度，并且暴露出每个第一导电体的一端。 因此，成型化合物覆盖基板的整个表面，使得基板表面上的接合焊盘不会被污染。

公开(公告)号：US20050185397A1

公开(公告)日：2005-08-25

申请号：US10856648

申请日：2004-05-28

Applicant: Chi-Chih Chu

Inventor： Chi-Chih Chu

IPC: F21V8/00 ,  F21V15/01 ,  G02F1/1335 ,  G02F1/13357

CPC classification number: G02F1/133608 ,  G02F2001/133317 ,  G02F2001/133325 ,  G02F2201/503 ,  G02F2203/68

Abstract: A direct backlight module and assembly method thereof. The direct light type backlight module has a light diffusing plate, a frame, a reflective back plate, and a light source. The light diffusing plate has a first positioning portion on an edge of the light diffusing plate. The frame has a groove corresponding to the light diffusing plate, and a second positioning portion corresponding to the first positioning portion is provided in the groove. The reflective back plate is provided on a side of the frame, forming a cavity between the reflective back plate and the light diffusing plate for disposition of the light source. In assembly, the light diffusing plate is slotted in the groove of the frame to form a light diffusing module, and the light diffusing module is assembled with the reflective back plate and the light source to form the direct backlight module.

Abstract translation: 一种直接背光模组及其装配方法。 直接光型背光模块具有光漫射板，框架，反射背板和光源。 光漫射板在光漫射板的边缘上具有第一定位部分。 框架具有对应于光漫射板的凹槽，并且在凹槽中设置与第一定位部相对应的第二定位部。 反射背板设置在框架的一侧，在反射背板和光漫射板之间形成空腔，用于配置光源。 在组装中，光漫射板被开槽在框架的凹槽中以形成光漫射模块，并且光扩散模块与反射背板和光源组装以形成直接背光模块。

公开(公告)号：US06866397B2

公开(公告)日：2005-03-15

申请号：US10349927

申请日：2003-01-24

Applicant: Wen-Yuan Cheng ,  Chi-Chih Chu

Inventor： Wen-Yuan Cheng ,  Chi-Chih Chu

IPC: H01R13/58 ,  H01R33/00

CPC classification number: H01R13/582

Abstract: A leading wire arrangement in a lighting fixture with back light module provides a set of connecting wire led from the lighting fixture to a rear side of the back light module via a lateral wall of the back light module.

Abstract translation: 具有背光模块的照明灯具中的导线布置提供了一组从照明器具引导的连接线，通过后灯模块的侧壁提供给背光模块的后侧。