公开(公告)号：US09171792B2

公开(公告)日：2015-10-27

申请号：US13037195

申请日：2011-02-28

申请人： Yu-Ching Sun ,  Fa-Hao Wu ,  Kuang-Hsiung Chen ,  Chi-Tsung Chiu

发明人： Yu-Ching Sun ,  Fa-Hao Wu ,  Kuang-Hsiung Chen ,  Chi-Tsung Chiu

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/28 ,  H01L23/498 ,  H01L23/31 ,  H01L25/10 ,  H01L25/00 ,  H01L25/16 ,  H01L23/00 ,  H01L25/065 ,  H01L23/552

CPC分类号： H01L23/49816 ,  H01L23/3128 ,  H01L23/552 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device package including a substrate, a first device module, a second device module, and an package body. The first device module and the second device module are disposed side-by-side on a carrier surface of the substrate. The first device module includes first connecting elements provided with a first pitch. The second device module includes second connecting elements provided with a second pitch. The first pitch is different from the second pitch. The package body is disposed on the carrier surface and covers the first chip module and the second chip module. The package body includes first openings exposing the first connecting elements and second openings exposing the second connecting elements.

摘要翻译： 一种半导体器件封装，包括衬底，第一器件模块，第二器件模块和封装体。 第一器件模块和第二器件模块并排设置在衬底的载体表面上。 第一器件模块包括设置有第一间距的第一连接元件。 第二设备模块包括具有第二间距的第二连接元件。 第一音调与第二音高不同。 封装体设置在载体表面上并覆盖第一芯片模块和第二芯片模块。 封装主体包括暴露第一连接元件的第一开口和暴露第二连接元件的第二开口。

公开(公告)号：US20120217642A1

公开(公告)日：2012-08-30

申请号：US13037195

申请日：2011-02-28

申请人： Yu-Ching Sun ,  Fa-Hao Wu ,  Kuang-Hsiung Chen ,  Chi-Tsung Chiu

发明人： Yu-Ching Sun ,  Fa-Hao Wu ,  Kuang-Hsiung Chen ,  Chi-Tsung Chiu

IPC分类号： H01L23/52 ,  H01L21/50

CPC分类号： H01L23/49816 ,  H01L23/3128 ,  H01L23/552 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device package including a substrate, a first device module, a second device module, and an package body. The first device module and the second device module are disposed side-by-side on a carrier surface of the substrate. The first device module includes first connecting elements provided with a first pitch. The second device module includes second connecting elements provided with a second pitch. The first pitch is different from the second pitch. The package body is disposed on the carrier surface and covers the first chip module and the second chip module. The package body includes first openings exposing the first connecting elements and second openings exposing the second connecting elements.

摘要翻译： 一种半导体器件封装，包括衬底，第一器件模块，第二器件模块和封装体。 第一器件模块和第二器件模块并排设置在衬底的载体表面上。 第一器件模块包括设置有第一间距的第一连接元件。 第二设备模块包括具有第二间距的第二连接元件。 第一音调与第二音高不同。 封装体设置在载体表面上并覆盖第一芯片模块和第二芯片模块。 封装主体包括暴露第一连接元件的第一开口和暴露第二连接元件的第二开口。

公开(公告)号：US20120049338A1

公开(公告)日：2012-03-01

申请号：US13290819

申请日：2011-11-07

申请人： Kuang-Hsiung Chen ,  Chi-Chih Shen ,  Jen-Chuan Chen ,  Wen-Hsiung Chang ,  Hui-Shan Chang ,  Pei-Yu Hsu ,  Fa-Hao Wu ,  Chen-Yu Chia ,  Chi-Chih Chu ,  Cheng-Yi Weng ,  Ya-Wen Hsu

发明人： Kuang-Hsiung Chen ,  Chi-Chih Shen ,  Jen-Chuan Chen ,  Wen-Hsiung Chang ,  Hui-Shan Chang ,  Pei-Yu Hsu ,  Fa-Hao Wu ,  Chen-Yu Chia ,  Chi-Chih Chu ,  Cheng-Yi Weng ,  Ya-Wen Hsu

IPC分类号： H01L23/48

CPC分类号： H01L23/3128 ,  H01L21/565 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) connecting elements disposed adjacent to a periphery of the substrate unit and extending upwardly from an upper surface of the substrate unit; (3) a semiconductor device disposed adjacent to the upper surface of the substrate unit and electrically connected to the substrate unit; and (4) a package body disposed adjacent to the upper surface of the substrate unit and covering the semiconductor device. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit. The package body defines openings that at least partially expose respective ones of the connecting elements. At least one of the connecting elements has a width WC, and at least one of the openings has a width WU adjacent to an upper surface of the package body, such that WU>WC.

摘要翻译： 在一个实施例中，半导体器件封装包括：（1）衬底单元; （2）连接元件，其邻近所述基板单元的周边设置并从所述基板单元的上表面向上延伸; （3）半导体器件，与所述衬底单元的上表面相邻并且电连接到所述衬底单元; 和（4）与衬底单元的上表面相邻并且覆盖半导体器件的封装体。 封装主体的侧表面基本上与衬底单元的侧表面对准。 包装体限定了至少部分地暴露相应的连接元件的开口。 连接元件中的至少一个具有宽度WC，并且至少一个开口具有与封装主体的上表面相邻的宽度WU，使得WU> WC。

公开(公告)号：US08076765B2

公开(公告)日：2011-12-13

申请号：US12507305

申请日：2009-07-22

申请人： Kuang-Hsiung Chen ,  Chi-Chih Shen ,  Jen-Chuan Chen ,  Wen-Hsiung Chang ,  Hui-Shan Chang ,  Pei-Yu Hsu ,  Fa-Hao Wu ,  Chen-Yu Chia ,  Chi-Chih Chu ,  Cheng-Yi Weng ,  Ya-Wen Hsu

发明人： Kuang-Hsiung Chen ,  Chi-Chih Shen ,  Jen-Chuan Chen ,  Wen-Hsiung Chang ,  Hui-Shan Chang ,  Pei-Yu Hsu ,  Fa-Hao Wu ,  Chen-Yu Chia ,  Chi-Chih Chu ,  Cheng-Yi Weng ,  Ya-Wen Hsu

IPC分类号： H01L21/44 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L23/3128 ,  H01L21/565 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) connecting elements disposed adjacent to a periphery of the substrate unit and extending upwardly from an upper surface of the substrate unit; (3) a semiconductor device disposed adjacent to the upper surface of the substrate unit and electrically connected to the substrate unit; and (4) a package body disposed adjacent to the upper surface of the substrate unit and covering the semiconductor device. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit. The package body defines openings that at least partially expose respective ones of the connecting elements. At least one of the connecting elements has a width WC, and at least one of the openings has a width WU adjacent to an upper surface of the package body, such that WU>WC.

摘要翻译： 在一个实施例中，半导体器件封装包括：（1）衬底单元; （2）连接元件，其邻近所述基板单元的周边设置并从所述基板单元的上表面向上延伸; （3）半导体器件，与所述衬底单元的上表面相邻并且电连接到所述衬底单元; 和（4）与衬底单元的上表面相邻并且覆盖半导体器件的封装体。 封装主体的侧表面基本上与衬底单元的侧表面对准。 包装体限定了至少部分地暴露相应的连接元件的开口。 连接元件中的至少一个具有宽度WC，并且至少一个开口具有与封装主体的上表面相邻的宽度WU，使得WU> WC。

公开(公告)号：US20110049704A1

公开(公告)日：2011-03-03

申请号：US12770627

申请日：2010-04-29

申请人： Yu-Ching Sun ,  Fa-Hao Wu ,  Kuang-Hsiung Chen

发明人： Yu-Ching Sun ,  Fa-Hao Wu ,  Kuang-Hsiung Chen

IPC分类号： H01L23/488 ,  H01L23/12 ,  H01L23/28 ,  H01L23/34 ,  H01L21/56 ,  H01L21/60

CPC分类号： H01L21/50 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/40 ,  H01L23/60 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one embodiment, a semiconductor device package includes a circuit substrate, a chip, a plurality of first solder balls, an encapsulant, and a heatsink. The circuit substrate includes a carrying surface and a plurality of first bonding pads thereon. The chip is disposed on the carrying surface and electrically connected to the circuit substrate. The first bonding pads are located outside of the chip. The first solder balls are disposed on the first bonding pads. The encapsulant is disposed on the carrying surface and covers the chip. The encapsulant includes a plurality of openings exposing the first solder balls. The heatsink is disposed over the encapsulant and bonded to the first solder balls, wherein the heatsink includes a plurality of protrusions on a bonding surface facing the encapsulant, and the protrusions are correspondingly embedded into the first solder balls.

摘要翻译： 在一个实施例中，半导体器件封装包括电路基板，芯片，多个第一焊球，密封剂和散热器。 电路基板包括承载表面和其上的多个第一接合焊盘。 芯片设置在承载表面上并电连接到电路基板。 第一个焊盘位于芯片的外部。 第一焊球设置在第一焊盘上。 密封剂设置在承载表面上并覆盖芯片。 密封剂包括暴露第一焊球的多个开口。 散热器设置在密封剂上方并结合到第一焊球，其中散热器包括在面向密封剂的接合表面上的多个突起，并且突起相应地嵌入第一焊球中。

公开(公告)号：US20100171205A1

公开(公告)日：2010-07-08

申请号：US12507305

申请日：2009-07-22

申请人： Kuang-Hsiung CHEN ,  Chi-Chih SHEN ,  Jen-Chuan CHEN ,  Wen-Hsiung CHANG ,  Hui-Shan CHANG ,  Pei-Yu HSU ,  Fa-Hao WU ,  Chen-Yu CHIA ,  Chi-Chih CHU ,  Cheng-Yi WENG ,  Ya-Wen HSU

发明人： Kuang-Hsiung CHEN ,  Chi-Chih SHEN ,  Jen-Chuan CHEN ,  Wen-Hsiung CHANG ,  Hui-Shan CHANG ,  Pei-Yu HSU ,  Fa-Hao WU ,  Chen-Yu CHIA ,  Chi-Chih CHU ,  Cheng-Yi WENG ,  Ya-Wen HSU

IPC分类号： H01L21/56 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/3128 ,  H01L21/565 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) connecting elements disposed adjacent to a periphery of the substrate unit and extending upwardly from an upper surface of the substrate unit; (3) a semiconductor device disposed adjacent to the upper surface of the substrate unit and electrically connected to the substrate unit; and (4) a package body disposed adjacent to the upper surface of the substrate unit and covering the semiconductor device. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit. The package body defines openings that at least partially expose respective ones of the connecting elements. At least one of the connecting elements has a width WC, and at least one of the openings has a width WU adjacent to an upper surface of the package body, such that WU>WC.

摘要翻译： 在一个实施例中，半导体器件封装包括：（1）衬底单元; （2）连接元件，其邻近所述基板单元的周边设置并从所述基板单元的上表面向上延伸; （3）半导体器件，与所述衬底单元的上表面相邻并且电连接到所述衬底单元; 和（4）与衬底单元的上表面相邻并且覆盖半导体器件的封装体。 封装主体的侧表面基本上与衬底单元的侧表面对准。 包装体限定了至少部分地暴露相应的连接元件的开口。 连接元件中的至少一个具有宽度WC，并且至少一个开口具有与封装主体的上表面相邻的宽度WU，使得WU> WC。