公开(公告)号：US07545658B2

公开(公告)日：2009-06-09

申请号：US11864332

申请日：2007-09-28

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： H02M3/18

CPC分类号： H02M3/07

摘要： A DC-DC boost converter comprises a charge pump selectively operating in a voltage doubler or in a voltage tripler mode. A switching arrangement connects the charge pump to an input voltage terminal in a charge phase and to an output voltage terminal in a discharge phase. A controllable current source is connected in series with the charge pump in the discharge phase and an error amplifier has a first input connected to a reference voltage, a second input connected to the output voltage terminal and an output connected to a control input of the controllable current source. The converter further comprises a mode changeover circuit with a first comparator having a first input connected to the output of the error amplifier and a second input connected to a first threshold voltage source. A second comparator has a first input connected to the output of the error amplifier and a second input connected to a second threshold voltage source. A flip-flop has its set input connected to the output of the first comparator, its reset input connected to the output of the second comparator. The flip-flop has its output connected to the switch arrangement to switch the charge pump from doubler mode to tripler mode when the voltage at the output of the error amplifier exceeds the second threshold voltage and back to doubler mode when the output voltage at the error amplifier drops below the first threshold voltage.

摘要翻译： DC-DC升压转换器包括选择性地以倍压器或三阶模式工作的电荷泵。 开关装置将电荷泵连接到充电阶段的输入电压端子和放电阶段中的输出电压端子。 可控电流源在放电阶段与电荷泵串联连接，误差放大器具有连接到参考电压的第一输入端，连接到输出电压端子的第二输入端和连接到可控制电流源的控制输入端的输出端 当前来源。 转换器还包括模式切换电路，其中第一比较器具有连接到误差放大器的输出端的第一输入端和连接到第一阈值电压源的第二输入端。 第二比较器具有连接到误差放大器的输出端的第一输入端和连接到第二阈值电压源的第二输入端。 触发器的设置输入连接到第一比较器的输出，其复位输入连接到第二比较器的输出。 触发器的输出连接到开关装置，以便当误差放大器输出端的电压超过第二阈值电压时，将电荷泵从倍频模式切换到三倍模式，当误差输出电压达到倍频模式时 放大器低于第一阈值电压。

公开(公告)号：US07340075B2

公开(公告)日：2008-03-04

申请号：US10960748

申请日：2004-10-08

申请人： Erich Bayer

发明人： Erich Bayer

IPC分类号： H04R25/00

CPC分类号： H04R25/652 ,  H04R2225/021 ,  H04R2225/63 ,  H04R2460/09

摘要： An otoplasty for behind-the-ear provisions for hearing aids, with which a preferably flexible signal conductor coming from the behind-the-ear device, such as a sound tube, can be positioned in the auditory canal. The otoplasty is individually adapted to the anatomy of the patient. Its fixing part is essentially in the form of a hook that follows the outer edge of the patient's cavum conchae in an arch, at least in some areas. A limb that follows the edge of the cavum conchae becomes a bent transversal section above the patient's antitragus, traversing the cavum conchae, extending in the direction of the patient's porus acusticus externus and expanding at its end section which comes to rest in the upper area of the auditory canal, to receive the signal conductor.

摘要翻译： 用于助听器的耳后设备的成形术，其中来自耳后装置（例如声管）的优选灵活的信号导体可以定位在听道中。 成形术单独适应患者的解剖学。 其固定部分基本上是一种钩子的形式，其至少在一些区域中跟随患者的拱形腔的外缘的外缘。 沿着空腔圆锥形边缘的肢体变成患者反垄断物上方的弯曲横截面，穿过腔囊，沿着患者的外耳廓的方向延伸，并在其末端部分延伸，其末端部分在 耳道，接收信号导体。

公开(公告)号：US20060033481A1

公开(公告)日：2006-02-16

申请号：US11199326

申请日：2005-08-08

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： G05F1/56

CPC分类号： G05F3/262 ,  H02M2001/0045

摘要： A DC/DC converter has a linear voltage regulator for reducing or eliminating the output ripple of the converter with a minimum loss of efficiency. The converter comprises a converter stage with a supply voltage input, a converted voltage output and a control input, a regulator stage having an input connected to the converted voltage output of the converter stage and an output connected to a load, and a tracking circuit with inputs for a voltage at the converted voltage output of the converter stage, a voltage at the output of the regulator stage and a load sense current, and an output connected to the control input of the converter stage. The tracking circuit controls the converter stage so as to increase the converted voltage with an increasing load sense current and vice versa. The output voltage of the converter is always just sufficient to eliminate the ripple without having to operate the regulator's pass transistor in its linear range.

摘要翻译： DC / DC转换器具有线性稳压器，以最小的效率损失减少或消除转换器的输出纹波。 转换器包括具有电源电压输入的转换器级，转换的电压输出和控制输入，具有连接到转换器级的转换的电压输出的输入的调节器级和连接到负载的输出，以及跟踪电路， 在转换器级的转换电压输出端的电压输入，调节器级的输出端的电压和负载感测电流，以及连接到转换器级的控制输入的输出。 跟踪电路控制转换器级，以便随着负载感测电流的增加而增加转换的电压，反之亦然。 转换器的输出电压总是足以消除纹波，而不必在其线性范围内操作稳压器的传输晶体管。

公开(公告)号：US06800404B2

公开(公告)日：2004-10-05

申请号：US10209186

申请日：2002-07-31

申请人： Peter Speckbacher ,  Georg Flatscher ,  Michael Allgäuer ,  Erich Bayer ,  Anton Sailer ,  Martin Ullrich

发明人： Peter Speckbacher ,  Georg Flatscher ,  Michael Allgäuer ,  Erich Bayer ,  Anton Sailer ,  Martin Ullrich

IPC分类号： G03F116

CPC分类号： G03F1/20 ,  H01J2237/31794

摘要： A method for producing a self-supporting electron-optical transparent structure that includes multi-layer strips and recesses located between the multi-layer strips. The method includes applying a first layer to a second layer, presetting a pattern by exposing or irradiating the first layer and etching the pattern out of the first layer so that partial areas of the second layer are uncovered. The method further includes galvanically applying layers to the uncovered partial areas of the second layer so that multi-layer strips are formed thereon and an electron-optical transparent structure is formed and removing the electron-optical transparent structure off the second layer.

摘要翻译： 一种用于制造自支撑电子 - 光学透明结构的方法，其包括位于多层条之间的多层条带和凹陷。 该方法包括将第一层施加到第二层，通过曝光或照射第一层来预先设置图案，并将图案从第一层蚀刻出来，使第二层的部分区域不被覆盖。 该方法还包括将层电镀到第二层的未覆盖部分区域，以便在其上形成多层条带并形成电子 - 光学透明结构，并从第二层除去电子 - 光学透明结构。

公开(公告)号：US06392904B1

公开(公告)日：2002-05-21

申请号：US09741951

申请日：2000-12-20

申请人： Erich Bayer ,  Hans Schmeller

发明人： Erich Bayer ,  Hans Schmeller

IPC分类号： H02M318

CPC分类号： H02M3/073 ,  H02M1/146 ,  H02M2001/0025 ,  H02M2001/0032 ,  Y02B70/16

摘要： The invention relates to a DC/DC converter including a charge pump circuit comprising one or more capacitors and a plurality of controllable switches connected thereto, the controllable switches being controllable by a control circuit so that the capacitors is/are alternatingly switched in a charging and discharge phase; a first current source set to a predetermined base current located either in the discharge or charging path of the charge pump circuit and a second current source connected in parallel thereto; and a regulator circuit for generating a first control signal representing the difference between a voltage characterizing the output voltage and a first reference voltage and controlling the second current source when the charge pump circuit is active so that the controllable current is reduced or increased with an increase and reduction respectively in the difference to track the voltage characterizing the output voltage in accordance with the first reference voltage; and for generating a second control signal guided to the control circuit, this signal assuming a first status when the voltage characterizing the output voltage exceeds a second reference voltage at a predetermined level above the first reference voltage, upon which the control circuit deactivates the charge pump circuit, and assumes a second status when the voltage characterizing the output voltage drops below the second reference voltage, upon which the control circuit activates the charge pump circuit. The invention relates further to a method of operating a DC/DC converter.

摘要翻译： 本发明涉及包括电荷泵电路的DC / DC转换器，该电荷泵电路包括一个或多个电容器和与其连接的多个可控开关，该可控开关由控制电路控制，使得电容器在充电和/ 放电阶段 设置在位于所述电荷泵电路的放电或充电路径中的预定基极电流的第一电流源和与其并联连接的第二电流源; 以及调节器电路，用于产生代表表征输出电压的电压与第一参考电压之间的差异的第一控制信号，并且当电荷泵电路处于活动状态时控制第二电流源，使得可控电流随着增加而减小或增加 并分别减小差异以跟踪表征根据第一参考电压的输出电压的电压; 并且用于产生被引导到控制电路的第二控制信号，当表征输出电压的电压超过高于第一参考电压的预定电平的第二参考电压时，该信号呈现第一状态，控制电路使电荷泵 并且当表征输出电压的电压下降到低于第二参考电压时，该控制电路启动电荷泵电路，并假定第二状态。 本发明还涉及一种操作DC / DC转换器的方法。

公开(公告)号：US5440274A

公开(公告)日：1995-08-08

申请号：US980822

申请日：1992-11-24

申请人： Erich Bayer

发明人： Erich Bayer

IPC分类号： H03D13/00 ,  H03L7/089 ,  H03L7/06

CPC分类号： H03D13/004 ,  H03L7/0891

摘要： A phase detector circuit (10) for generating an analog signal (VR) dependent upon the phase difference between two digital signals (VE, VA) includes two NOR circuits (20, 27) to the inputs (18, 26; 28, 24) of which the two digital signals are supplied on the one hand delayed and negated and on the other directly. The output signals of the NOR circuits (20, 27) control two current sources (S1, S2), one of which in the activated state furnishes a constant charge current (I1) for a storage capacitor (C) whilst the other of which leads a constant discharge current (I2) of equal magnitude away from said storage capacitor (C). The charge voltage at said storage capacitor (C) is an analog signal (VR) which represents a measure of the phase deviation between the digital signals (VE, VA).

摘要翻译： 用于根据两个数字信号（VE，VA）之间的相位差产生模拟信号（VR）的相位检测器电路（10）包括到输入端（18,26; 28,24）的两个NOR电路（20,27） 其中两个数字信号一方面被延迟和否定，另一个直接提供。 NOR电路（20,27）的输出信号控制两个电流源（S1，S2），其中一个处于激活状态，为存储电容器（C）提供恒定的充电电流（I1），而另一个导通 与所述存储电容器（C）相等幅度的恒定放电电流（I2）。 所述存储电容器（C）的充电电压是模拟信号（VR），其表示数字信号（VE，VA）之间的相位偏差的量度。

公开(公告)号：US5397931A

公开(公告)日：1995-03-14

申请号：US255841

申请日：1994-06-08

申请人： Erich Bayer

发明人： Erich Bayer

IPC分类号： H02M3/07 ,  H03K17/687 ,  H01L27/06 ,  H02M7/25

CPC分类号： H02M3/07 ,  H03K17/6872

摘要： The present invention relates to a voltage multiplier for generating an output voltage which is several times greater than the operating voltage for connection of a load connected to ground to the operating voltage by means of an N-channel power MOS transistor, comprising a plurality of capacitors (C1, C2, C3), a control input (C) for supplying a control signal, an output (V.sub.out), an operating voltage terminal (Vb) and a ground terminal (M). In known voltage multipliers, for rectification and multiplication of the output voltage diodes are used which reduce the maximum output voltage obtainable and restrict the clock frequency of the control signal to a few hundred kHz. In contrast, the voltage multiplier according to the invention has a high efficiency and can also be used at high clock frequencies; it includes a switchover means which comprises a control signal generator (S) having a plurality of inverters (I0, I1, I2, I3) and a first and second group of switch elements which are constructed as MOS field-effect transistors and can be driven with clock frequencies of up to 4 MHz. These MOS field-effect transistors are controlled by means of the control signal generator (S) by control signals in such a manner that the capacitors are periodically switched between a series connection and a parallel connection.

摘要翻译： 本发明涉及一种用于产生输出电压的电压倍增器，该输出电压比用于通过N沟道功率MOS晶体管将连接到地的负载连接到工作电压的工作电压大几倍，包括多个电容器 （C1，C2，C3），用于提供控制信号的控制输入（C），输出（Vout），工作电压端子（Vb）和接地端子（M）。 在已知的电压倍增器中，使用用于整流和乘法的输出电压二极管，其降低可获得的最大输出电压并将控制信号的时钟频率限制在几百kHz。 相反，根据本发明的电压倍增器具有高效率并且也可以在高时钟频率下使用; 它包括切换装置，其包括具有多个反相器（I0，I1，I2，I3）的控制信号发生器（S）以及被构造为MOS场效应晶体管的第一和第二组开关元件，并且可被驱动 时钟频率高达4 MHz。 通过控制信号通过控制信号发生器（S）控制这些MOS场效应晶体管，使得电容器在串联和并联之间周期性地切换。

公开(公告)号：US4368245A

公开(公告)日：1983-01-11

申请号：US205564

申请日：1980-11-10

申请人： Erich Bayer

发明人： Erich Bayer

IPC分类号： G03B13/02 ,  C23F1/00 ,  G02B5/02 ,  G03B13/24 ,  G03F1/00 ,  G03C5/06

CPC分类号： G02B5/0221 ,  G02B5/0268 ,  G02B5/0278 ,  G03F1/50

摘要： A process for photolithographically producing matt diffusion patterns is disclosed. The matt diffusion patterns can be formed along with opaque and transparent patterns on the same pattern carrier plate. According to this process, a photoexposure mask corresponding to the desired matt pattern is made by photolithography, which mask is then used in subsequent photolithographic processes to form the matt diffusion pattern on pattern carrier plates. The process of making the exposure mask involves forming a mask of a desired diffusion pattern, applying a photoresist layer to the mask, exposing the photoresist layer through a diffusion plate, developing the photoresist layer, applying an opaque layer to the mask, and removing the photoresist layer. In subsequent photolithographic processes the exposure mask is printed on transparent pattern carrier plates, and the exposed areas of the pattern carrier plates are deeply etched to form the matt diffusion patterns.

摘要翻译： 公开了一种用于光刻产生亚光扩散图案的方法。 亚光扩散图案可以与相同图案载体板上的不透明和透明图案一起形成。 根据该方法，通过光刻法制作对应于期望的无光图案的光曝光掩模，然后将该掩模用于随后的光刻工艺中以在图案载体板上形成无光散射图案。 制作曝光掩模的过程包括形成期望的扩散图案的掩模，向掩模施加光致抗蚀剂层，通过漫射板曝光光致抗蚀剂层，显影光致抗蚀剂层，向掩模施加不透明层，以及去除 光致抗蚀剂层。 在随后的光刻工艺中，将曝光掩模印刷在透明图案载体板上，并且图案载体板的暴露区域被深刻蚀刻以形成无光散射图案。

公开(公告)号：US4359519A

公开(公告)日：1982-11-16

申请号：US116494

申请日：1980-01-29

申请人： Heinz Kraus ,  Erich Bayer

发明人： Heinz Kraus ,  Erich Bayer

IPC分类号： G03F7/26 ,  G03C7/00 ,  G03F1/00 ,  G03F7/00 ,  G03F7/09 ,  G03C5/00 ,  B44F1/08 ,  G02B5/28

CPC分类号： G03F7/0035 ,  G03C7/00 ,  Y10S428/913 ,  Y10T428/24802

摘要： A process for forming a high resolution recording medium including at least a high resolution, patterned interference filter formed from at least two reflecting layers separated by an interference layer including the step of removing patterned portions of a reflective layer not protected by a photosensitive layer by means of chemical etching or ion beam etching. When chemical etching is used, the etching process is accelerated to reduce under-etching by maintaining a rapid, thorough, and continuous boundary surface exchange of the etching solution at the boundary between the etching solution and the reflective layer being etched.

摘要翻译： 一种用于形成高分辨率记录介质的方法，所述高分辨率记录介质至少包括由至少两个被干涉层隔开的反射层形成的高分辨率图案化干涉滤光器，该干涉滤光器包括以下步骤：除去未被感光层保护的反射层的图案化部分 化学蚀刻或离子束蚀刻。 当使用化学蚀刻时，通过在蚀刻溶液和被蚀刻的反射层之间的边界处保持蚀刻溶液的快速，彻底和连续的边界表面交换来加速蚀刻工艺以减少欠蚀刻。

公开(公告)号：US07659754B2

公开(公告)日：2010-02-09

申请号：US11939439

申请日：2007-11-13

申请人： Gerhard Thiele ,  Erich Bayer

发明人： Gerhard Thiele ,  Erich Bayer

IPC分类号： H03B1/00 ,  H03K3/00

CPC分类号： H03K17/687 ,  H03K17/04123 ,  H03K17/063 ,  H03K2217/0036

摘要： A power switching circuit in CMOS technology has a power MOS transistor and a driver stage. The power MOS transistor is operated at a higher supply voltage in excess of its maximum allowable gate-source voltage; and the driver stage of the level shifter is operated at a lower supply voltage substantially lower than the supply voltage for the power MOS transistor. The driver stage includes a pair of driver MOS transistors coupled in series between a higher supply voltage rail and a reference potential rail, and at an interconnection node coupled to the gate of the power MOS transistor. The gates of the driver MOS transistors are AC-coupled to drive signals of mutually opposite phase; and the gates of the driver MOS transistors are each connected to the higher voltage supply rail through a respective parallel connection of a first resistor and a second resistor connected in series with a non-linear component. The resistance value of the second resistor is substantially smaller than the resistance value of the first resistor.

摘要翻译： CMOS技术中的功率开关电路具有功率MOS晶体管和驱动级。 功率MOS晶体管在比其最大允许栅极 - 源极电压更高的电源电压下工作; 并且电平移位器的驱动器级在基本上低于功率MOS晶体管的电源电压的较低电源电压下操作。 驱动器级包括串联在较高电源电压轨和参考电位轨之间的一对驱动器MOS晶体管，以及耦合到功率MOS晶体管的栅极的互连节点。 驱动器MOS晶体管的栅极被AC耦合以驱动相反相位的信号; 并且驱动器MOS晶体管的栅极通过与非线性分量串联连接的第一电阻器和第二电阻器的相应并联连接而连接到较高电压源轨。 第二电阻器的电阻值显着小于第一电阻器的电阻值。