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公开(公告)号:US20240014101A1
公开(公告)日:2024-01-11
申请号:US17858660
申请日:2022-07-06
Applicant: GlobalFoundries U.S. Inc.
Inventor: Ramsey Hazbun , Cameron Luce , Siva P. Adusumilli , Mark Levy
IPC: H01L23/473 , H01L23/367 , H01L21/762 , H01L29/51
CPC classification number: H01L23/473 , H01L23/367 , H01L21/76229 , H01L29/515
Abstract: Structures for a microfluidic channel and methods of forming a structure for a microfluidic channel. The structure comprises a trench in a semiconductor substrate and a semiconductor layer inside the trench. The trench has an entrance and a sidewall extending from the entrance into the semiconductor substrate. The semiconductor layer has a first portion surrounding a portion of the trench to define a cavity and a second portion positioned to obstruct the entrance to the trench. The second portion of the semiconductor layer is thicker than the first portion of the semiconductor layer.
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公开(公告)号:US20240009668A1
公开(公告)日:2024-01-11
申请号:US17858461
申请日:2022-07-06
Applicant: GlobalFoundries U.S. Inc.
Inventor: Ramsey Hazbun , Siva P. Adusumilli , Mark Levy , Bartlomiej Jan Pawlak
CPC classification number: B01L3/50273 , B81B1/002 , B81C1/00071 , B81B2201/05 , B81B2203/0338 , B01L2300/0645 , B01L2300/12 , B01L2400/0424
Abstract: Structures for a microfluidic channel and methods of forming a structure for a microfluidic channel. The structure comprises a semiconductor substrate including a trench and a layer stack on the semiconductor substrate. The layer stack includes a first layer, a second layer between the first layer and the semiconductor substrate, and an opening penetrating through the first layer and the second layer to the trench. The structure further comprises a third layer inside the opening in the layer stack. The third layer, which comprises a semiconductor material, obstructs the opening to define a cavity inside the trench.
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公开(公告)号:US11605649B2
公开(公告)日:2023-03-14
申请号:US17306078
申请日:2021-05-03
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Mark D. Levy , Siva P. Adusumilli , Alvin J. Joseph , Ramsey Hazbun
IPC: H01L27/12 , H01L21/762 , H01L23/66 , H01L21/8234
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to switches in a bulk substrate and methods of manufacture. The structure includes: at least one active device having a channel region of a first semiconductor material; a single air gap under the channel region of the at least one active device; and a second semiconductor material being coplanar with and laterally bounding at least one side of the single air gap, the second semiconductor material being different material than the first semiconductor material.
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公开(公告)号:US11374040B1
公开(公告)日:2022-06-28
申请号:US17113418
申请日:2020-12-07
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: John J. Ellis-Monaghan , Steven M. Shank , Rajendran Krishnasamy , Ramsey Hazbun
IPC: H01L27/144 , H01L31/028 , H01L31/18 , H01L31/103 , H01L31/0312
Abstract: Structures including multiple photodiodes and methods of fabricating a structure including multiple photodiodes. A substrate has a first trench extending to a first depth into the substrate and a second trench extending to a second depth into the substrate that is greater than the first depth. A first photodiode includes a first light-absorbing layer containing a first material positioned in the first trench. A second photodiode includes a second light-absorbing layer containing a second material positioned in the second trench. The first material and the second material each include germanium.
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公开(公告)号:US11195715B2
公开(公告)日:2021-12-07
申请号:US16821228
申请日:2020-03-17
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Siva P. Adusumilli , Cameron Luce , Ramsey Hazbun , Mark Levy , Anthony K. Stamper , Alvin J. Joseph
IPC: H01L21/02 , H01L21/762 , H01L21/324
Abstract: Methods of forming structures with electrical isolation. A dielectric layer is formed over a semiconductor substrate, openings are patterned in the dielectric layer that extend to the semiconductor substrate, and a semiconductor material is epitaxially grown from portions of the semiconductor substrate that are respectively exposed inside the openings. The semiconductor material, during growth, defines a semiconductor layer that includes first portions respectively coincident with the openings and second portions that laterally grow from the first portions to merge over a top surface of the dielectric layer. A modified layer containing a trap-rich semiconductor material is formed in the semiconductor substrate.
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公开(公告)号:US20210287902A1
公开(公告)日:2021-09-16
申请号:US16815070
申请日:2020-03-11
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Ramsey Hazbun , Alvin J. Joseph , Siva P. Adusumilli , Cameron Luce
IPC: H01L21/02
Abstract: Disclosed are semiconductor structure embodiments of a semiconductor-on-insulator region on a bulk substrate. The semiconductor-on-insulator region includes an upper semiconductor layer above and physically separated from the substrate by insulator-containing cavities (e.g., by dielectric layer and/or a pocket of trapped air, of trapped gas, or under vacuum) and, optionally, by a lower semiconductor layer. Disclosed method embodiments include forming openings that extend vertically through the upper semiconductor layer, through a sacrificial semiconductor layer and, optionally, through a lower semiconductor layer to the substrate. Then, a selective isotropic etch process is performed to form cavities, which extend laterally off the sides of the openings into the sacrificial semiconductor layer. Depending upon the embodiments, different process steps are further performed to form plugs in at least the upper portions of the openings and insulators (including dielectric layers and/or a pocket of trapped air, of trapped gas or under vacuum) in the cavities.
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