POSITION DETECTION SYSTEMS AND METHODS
    21.
    发明申请

    公开(公告)号:US20180299297A1

    公开(公告)日:2018-10-18

    申请号:US15487819

    申请日:2017-04-14

    Abstract: A system for detecting a position of a dual solenoid device includes device configured to move between first and second positions, and a controller. The controller has first and second monitoring circuits in operable communication with first and second channels, respectively. The first and second channels are in operable communication with first and second solenoids, respectively. Each solenoid is configured to selectively operate as an active solenoid to move the device when the solenoid and its respective channel are in an active mode, and as a passive solenoid when the solenoid and its respective channel are in a passive mode to passively move with the active solenoid. Each of the monitoring circuits is configured to determine a position of the device when the channel the monitoring circuit is associated with is operating in the passive mode by monitoring an electrical parameter of the passive solenoid associated with that channel.

    INTEGRATED SYSTEM AND METHOD FOR TESTING SYSTEM TIMING MARGIN

    公开(公告)号:US20170322588A1

    公开(公告)日:2017-11-09

    申请号:US15149897

    申请日:2016-05-09

    CPC classification number: G01R31/31727 G01R31/31922 G06F1/08 H03L7/16

    Abstract: A built-in test circuit for testing a system timing margin of a processing device under-test is provided. The processing device includes a controller and first clock circuit, wherein the first clock circuit generates a first clock signal and the first clock signal is a main clock signal provided for operation of the processing device. The built-in test circuit includes a second clock circuit and a logic circuit, both of which are integrated with the processing device. The second clock circuit generates a second clock signal. The logic circuit processes the first and second clock signals and outputs a third clock signal. The third clock signal is used to determine system timing margin of the processing device.

    Strain gauge pressure sensor circuit with sensor disconnect detection
    24.
    发明授权
    Strain gauge pressure sensor circuit with sensor disconnect detection 有权
    应变表压力传感器电路与传感器断开检测

    公开(公告)号:US09322732B2

    公开(公告)日:2016-04-26

    申请号:US14158431

    申请日:2014-01-17

    CPC classification number: G01L9/04 G01L27/007

    Abstract: An electronic circuit for processing signals from a strain gauge pressure sensor includes an anti-alias filter, an analog-to-digital conversion circuit, and a detection circuit for detecting when the sensor is unexpectedly disconnected from the signal processing circuit. The detection circuit provides a yes/no indication of the connection of the pressure sensor to the circuit based upon whether a common mode voltage associated with one of the signal terminals of the pressure sensor is out of range.

    Abstract translation: 用于处理来自应变计压力传感器的信号的电子电路包括抗混叠滤波器,模数转换电路和用于检测传感器何时意外从信号处理电路断开的检测电路。 基于与压力传感器的信号端子中的一个相关联的共模电压是否超出范围,检测电路提供压力传感器与电路的连接的是/否指示。

    METHOD AND APPARATUS FOR MULTIPLEXED TIME ALIGNED ANALOG INPUT SAMPLING
    25.
    发明申请
    METHOD AND APPARATUS FOR MULTIPLEXED TIME ALIGNED ANALOG INPUT SAMPLING 有权
    用于多路复用时间对准模拟输入采样的方法和装置

    公开(公告)号:US20140269775A1

    公开(公告)日:2014-09-18

    申请号:US13795815

    申请日:2013-03-12

    CPC classification number: H04J3/02 G08C15/00 H04Q9/00 H04Q2209/845

    Abstract: A sensor system includes a first sensor and a second sensor and a multiplexor having at least two multiplexer inputs connected to the sensors. The output of the multiplexor is connected to a time correlation logic circuit via at least a signal conditioning and anti-aliasing filter, and the output of the time correlation logic is a time correlated sensor reading of the first and second sensor.

    Abstract translation: 传感器系统包括第一传感器和第二传感器以及具有连接到传感器的至少两个多路复用器输入的多路复用器。 多路复用器的输出通过至少一个信号调理和抗混叠滤波器连接到时间相关逻辑电路,时间相关逻辑的输出是第一和第二传感器的时间相关传感器读数。

    Clock drift monitor
    26.
    发明授权

    公开(公告)号:US12085977B2

    公开(公告)日:2024-09-10

    申请号:US17553917

    申请日:2021-12-17

    CPC classification number: G06F1/08 G06F1/12 G06F9/30021 G06F9/30029

    Abstract: Provided are embodiments for monitoring clock drift. Embodiments may include an XOR gate that is configured to receive a first clock signal from a first clock source and a second clock signal from a second clock source, wherein the XOR logic gate is further configured to generate a switching output based on an XOR operation of the first clock signal and the second clock signal, and a rising edge detector and a falling edge detector that are configured to detect a rising edge and a falling edge of the switching output. Embodiments may also include an AND gate that is configured to threshold compare the rising edge to a configurable threshold to determine if a fault condition exists indicating clock drift between the first clock signal and the second clock signal and provide an indication of the fault condition based at least in part on the comparison.

    High speed AC input sensor conversion

    公开(公告)号:US11092464B2

    公开(公告)日:2021-08-17

    申请号:US16246918

    申请日:2019-01-14

    Abstract: A system for determining an amplitude of a sinusoidal output waveform from a sensor includes a controller configured to provide a sample signal having a sample frequency that is four times a frequency of a sinusoidal excitation waveform provided to the sensor. The sensor has inductively-coupled primary and secondary windings that produce the sinusoidal output waveform from the secondary winding when the excitation waveform is provided to the primary winding. An analog-to-digital converter measures a first and second voltage of the sensor waveform separated in time by the period of the sample frequency, and the system calculates the amplitude based on the measurements of the first and second voltages.

Patent Agency Ranking