公开(公告)号：US09007504B2

公开(公告)日：2015-04-14

申请号：US13441697

申请日：2012-04-06

申请人： Sohei Manabe ,  Jeong-Ho Lyu

发明人： Sohei Manabe ,  Jeong-Ho Lyu

IPC分类号： H04N5/335 ,  H01L27/146

CPC分类号： H01L27/14609 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/1464

摘要： Circuitry to reduce signal noise characteristics in an image sensor. In an embodiment, a bit trace line segment is located between neighboring respective segments of a source follower power trace and an additional trace which is to remain at a first voltage level during a pixel cell readout time period. In another embodiment, for each such trace segment, a smallest separation between the trace segment and the respective neighboring other one of such trace segments is substantially equal to or less than some maximum length to provide for parasitic capacitance between the bit line trace and one or more other traces.

摘要翻译： 降低图像传感器信号噪声特性的电路。 在一个实施例中，位跟踪线段位于源极跟随器功率迹线的相邻相应段和在像素单元读出时间段期间保持在第一电压电平的附加迹线。 在另一个实施例中，对于每个这样的迹线段，迹线段和这些迹线段中相应的相邻另一个之间的最小间隔基本上等于或小于一些最大长度，以提供位线迹线与位线迹线之间的寄生电容， 更多的其他痕迹。

公开(公告)号：US08804021B2

公开(公告)日：2014-08-12

申请号：US13288880

申请日：2011-11-03

申请人： Sohei Manabe ,  Keh-Chiang Ku ,  Vincent Venezia ,  Hsin-Chih Tai ,  Duli Mao ,  Howard E. Rhodes

发明人： Sohei Manabe ,  Keh-Chiang Ku ,  Vincent Venezia ,  Hsin-Chih Tai ,  Duli Mao ,  Howard E. Rhodes

IPC分类号： H04N3/14 ,  H04N5/335

CPC分类号： H01L27/14643 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14616 ,  H01L27/1463 ,  H01L27/14641

摘要： Techniques and mechanisms for improving full well capacity for pixel structures in an image sensor. In an embodiment, a first pixel structure of the image sensor includes an implant region, where a skew of the implant region corresponds to an implant angle, and a second pixel structure of the image sensor includes a transfer gate. In another embodiment, an offset of the implant region of the first pixel structure from the transfer gate of the second pixel structure corresponds to the implant angle.

摘要翻译： 用于提高图像传感器中像素结构的完整容量的技术和机制。 在一个实施例中，图像传感器的第一像素结构包括植入区域，其中植入区域的偏斜对应于植入角度，并且图像传感器的第二像素结构包括传输门。 在另一个实施例中，第一像素结构的注入区域与第二像素结构的传输门的偏移对应于植入角度。

公开(公告)号：US20140063304A1

公开(公告)日：2014-03-06

申请号：US13599343

申请日：2012-08-30

申请人： Sohei Manabe ,  Jeong-Ho Lyu

发明人： Sohei Manabe ,  Jeong-Ho Lyu

IPC分类号： H04N5/335 ,  H01L27/146

CPC分类号： H01L27/14612 ,  H01L27/14641 ,  H04N5/353 ,  H04N5/3532 ,  H04N5/3745 ,  H04N5/37452

摘要： An image sensor pixel includes a photosensitive region and pixel circuitry. The photosensitive region accumulates an image charge in response to light incident upon the image sensor. The pixel circuitry includes a transfer-storage transistor, a charge-storage area, an output transistor, and a floating diffusion region. The transfer-storage transistor is coupled between the photosensitive region and the charge-storage area. The output transistor has a channel coupled between the charge-storage area and the floating diffusion region and has a gate tied to a fixed voltage potential. The transfer-storage transistor causes the image charge to transfer from the photosensitive region to the charge-storage area and to transfer from the charge-storage area to the floating diffusion region.

摘要翻译： 图像传感器像素包括光敏区域和像素电路。 感光区域响应入射到图像传感器上的光积累图像电荷。 像素电路包括转移存储晶体管，电荷存储区域，输出晶体管和浮动扩散区域。 转移存储晶体管耦合在感光区域和电荷存储区域之间。 输出晶体管具有耦合在电荷存储区域和浮动扩散区域之间并且具有连接到固定电压电位的栅极的沟道。 转移储存晶体管使得图像电荷从光敏区域转移到电荷存储区域并从电荷存储区域转移到浮动扩散区域。

公开(公告)号：US08461660B2

公开(公告)日：2013-06-11

申请号：US13251036

申请日：2011-09-30

申请人： Sohei Manabe

发明人： Sohei Manabe

IPC分类号： H01L27/146

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14641 ,  H01L27/14645

摘要： Techniques and mechanisms to improve potential well characteristics in a pixel cell. In an embodiment, a coupling portion of a pixel cell couples a reset transistor of the pixel cell to a floating diffusion node of the pixel cell, the reset transistor to reset a voltage of the floating diffusion node. In another embodiment, the pixel cell includes a shield line which extends athwart the coupling portion, where the shield line is to reduce a parasitic capacitance of the reset transistor to the floating diffusion node.

公开(公告)号：US20130082313A1

公开(公告)日：2013-04-04

申请号：US13251036

申请日：2011-09-30

申请人： Sohei Manabe

发明人： Sohei Manabe

IPC分类号： H01L27/146

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14641 ,  H01L27/14645

摘要： Techniques and mechanisms to improve potential well characteristics in a pixel cell. In an embodiment, a coupling portion of a pixel cell couples a reset transistor of the pixel cell to a floating diffusion node of the pixel cell, the reset transistor to reset a voltage of the floating diffusion node. In another embodiment, the pixel cell includes a shield line which extends athwart the coupling portion, where the shield line is to reduce a parasitic capacitance of the reset transistor to the floating diffusion node.

摘要翻译： 改善像素单元中潜在井特性的技术和机制。 在一个实施例中，像素单元的耦合部分将像素单元的复位晶体管耦合到像素单元的浮动扩散节点，复位晶体管复位浮动扩散节点的电压。 在另一个实施例中，像素单元包括屏蔽线，其延伸到耦合部分，屏蔽线将降低复位晶体管对浮动扩散节点的寄生电容。

公开(公告)号：US20090128660A1

公开(公告)日：2009-05-21

申请号：US11942604

申请日：2007-11-19

申请人： Tiejun Dai ,  Sohei Manabe ,  Hongtao Yao ,  Jingzhou Zhang ,  Liping Deng

发明人： Tiejun Dai ,  Sohei Manabe ,  Hongtao Yao ,  Jingzhou Zhang ,  Liping Deng

IPC分类号： G01J1/18 ,  H04N5/217

CPC分类号： H04N5/14 ,  H01L31/1105 ,  H04N5/144 ,  H04N5/235 ,  H04N5/2357 ,  H04N5/3765

摘要： An apparatus for measuring the power frequency of a light source includes a photo-sensitive transistor, a modulators and a logic unit. The photo-sensitive transistor generates an electrical signal that is responsive to light incident thereon from the light source. The modulator generates a modulated signal based on the electrical signal that toggles at a rate substantially proportional to the power frequency of the light source. The logic unit is coupled to receive the modulated signal and determine its toggling frequency.

摘要翻译： 用于测量光源的功率频率的装置包括光敏晶体管，调制器和逻辑单元。 光敏晶体管产生响应于从光源入射到其上的光的电信号。 调制器基于电信号产生调制信号，该电信号以基本上与光源的功率频率成比例的速率切换。 逻辑单元被耦合以接收调制信号并确定其切换频率。

公开(公告)号：US08686477B2

公开(公告)日：2014-04-01

申请号：US13558231

申请日：2012-07-25

申请人： Sohei Manabe ,  Jeong-Ho Lyu

发明人： Sohei Manabe ,  Jeong-Ho Lyu

IPC分类号： H01L27/148 ,  H01L29/768 ,  H01L31/062 ,  H01L31/113 ,  H01L27/146

CPC分类号： H01L27/14614 ,  H01L27/14607 ,  H01L27/14616 ,  H01L27/14689

摘要： Pixel array structures to provide a ground contact for a CMOS pixel cell. In an embodiment, an active area of a pixel cell includes a photodiode disposed in a first portion of an active area, where a second portion of the active area extends from a side of the first portion. The second portion includes a doped region to provide a ground contact for the active area. In another embodiment, the pixel cell includes a transistor to transfer the charge from the photodiode, where a gate of the transistor is adjacent to the second portion and overlaps the side of the first portion.

摘要翻译： 像素阵列结构为CMOS像素单元提供接地触点。 在一个实施例中，像素单元的有源区域包括设置在有源区域的第一部分中的光电二极管，其中有源区域的第二部分从第一部分的一侧延伸。 第二部分包括用于为有源区域提供接地触点的掺杂区域。 在另一个实施例中，像素单元包括用于从光电二极管转移电荷的晶体管，其中晶体管的栅极与第二部分相邻并与第一部分的一侧重叠。

公开(公告)号：US08426796B2

公开(公告)日：2013-04-23

申请号：US13619879

申请日：2012-09-14

申请人： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Howard E. Rhodes ,  Sohei Manabe

发明人： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Howard E. Rhodes ,  Sohei Manabe

IPC分类号： H01L27/146

CPC分类号： H04N5/35509 ,  H04N5/3559 ,  H04N5/3597 ,  H04N5/37452 ,  H04N5/376

摘要： An image sensor includes a pixel array, a bit line, a supplemental capacitance node line, and a control circuit. The pixel array includes a plurality of pixel cells each including a floating diffusion (“FD”) node and a photosensitive element coupled to selectively transfer image charge to the FD node. The bit line is coupled to selectively conduct image data output from a first group of the pixel cells. The supplemental capacitance node line is coupled to the FD node of a second group of the pixel cells different from the first group. The control circuit is coupled to the supplemental capacitance node line to selectively increase the potential at the FD node of each of the pixel cells of the second group by selectively asserting a FD boost signal on the supplemental capacitance node line.

摘要翻译： 图像传感器包括像素阵列，位线，补充电容节点线和控制电路。 像素阵列包括多个像素单元，每个像素单元包括浮动扩散（“FD”）节点和耦合以选择性地将图像电荷传送到FD节点的感光元件。 位线被耦合以选择性地进行从第一组像素单元输出的图像数据。 辅助电容节点线耦合到与第一组不同的第二组像素单元的FD节点。 控制电路通过选择性地在辅助电容节点线上确定FD升压信号来耦合到辅助电容节点线，以选择性地增加第二组的每个像素单元的FD节点的电位。

公开(公告)号：US08294077B2

公开(公告)日：2012-10-23

申请号：US12972188

申请日：2010-12-17

申请人： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Howard E. Rhodes ,  Sohei Manabe

发明人： Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Howard E. Rhodes ,  Sohei Manabe

IPC分类号： H01L27/146

CPC分类号： H04N5/35509 ,  H04N5/3559 ,  H04N5/3597 ,  H04N5/37452 ,  H04N5/376

摘要： An image sensor includes a pixel array, a bit line, supplemental capacitance node line, and a supplemental capacitance circuit. The pixel array includes a plurality of pixel cells each including a floating diffusion (“FD”) node and a photosensitive element coupled to selectively transfer image charge to the FD node. The bit line is coupled to selectively conduct image data output from a first group of the pixel cells. The supplemental capacitance node line is coupled to the FD node of a second group of the pixel cells to selectively couple a supplemental capacitance to the FD nodes of the second group in response to a control signal. In various embodiments, the first and second group of pixel cells may be the same group or a different group of the pixel cells and may add a capacitive boost feature or a multi conversion gain feature.

摘要翻译： 图像传感器包括像素阵列，位线，补充电容节点线和补充电容电路。 像素阵列包括多个像素单元，每个像素单元包括浮动扩散（FD）节点和耦合以选择性地将图像电荷传送到FD节点的感光元件。 位线被耦合以选择性地进行从第一组像素单元输出的图像数据。 辅助电容节点线耦合到第二组像素单元的FD节点，以响应于控制信号选择性地将辅助电容耦合到第二组的FD节点。 在各种实施例中，第一和第二组像素单元可以是相同的组或像素单元的不同组，并且可以添加电容性升压特征或多转换增益特征。

公开(公告)号：US20110284982A1

公开(公告)日：2011-11-24

申请号：US13198574

申请日：2011-08-04

申请人： Sohei Manabe

发明人： Sohei Manabe

IPC分类号： H01L31/0232

CPC分类号： H01L27/1469 ,  H01L27/14625 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/14698

摘要： Embodiments of a process comprising forming a pixel on a front side of a substrate, thinning the substrate, depositing a doped silicon layer on a backside of the thinned substrate, and diffusing a dopant from the doped silicon layer into the substrate. Embodiments of an apparatus comprising a pixel formed on a front side of a thinned substrate, a doped silicon layer formed on a backside of the thinned substrate, and a region in the thinned substrate, and near the backside, where a dopant has diffused from the doped silicon layer into the thinned substrate. Other embodiments are disclosed and claimed.

摘要翻译： 一种方法的实施方案包括在衬底的前侧形成像素，使衬底变薄，在掺杂硅衬底的背面沉积掺杂硅层，以及将掺杂剂从掺杂硅层扩散到衬底中。 包括形成在薄化衬底的前侧上的像素的装置的实施例，形成在薄化衬底的背面上的掺杂硅层，以及薄化衬底中的区域，以及靠近背面的掺杂剂，其中掺杂剂从 掺杂的硅层进入薄的衬底。 公开和要求保护其他实施例。