公开(公告)号：US07517771B2

公开(公告)日：2009-04-14

申请号：US11496708

申请日：2006-08-01

申请人： Takumi Shibata ,  Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Masaru Hori

发明人： Takumi Shibata ,  Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Masaru Hori

IPC分类号： H01L21/76

CPC分类号： H01L21/28525 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/28562 ,  H01L29/045 ,  H01L29/0634 ,  H01L29/66734

摘要： A method for manufacturing a semiconductor device includes steps of: forming a trench on a semiconductor substrate, which is made of silicon; and filling the trench with an epitaxial layer. The epitaxial layer is made of silicon, and the step of filling the trench includes a step of performing a plasma CVD method with using a silicon source gas. By using anisotropic character of a plasma, the epitaxial layer is selectively deposited on a bottom of the trench. Thus, the trench is filled with the epitaxial layer having no void.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在由硅制成的半导体衬底上形成沟槽; 并用外延层填充沟槽。 外延层由硅制成，填充沟槽的步骤包括使用硅源气体进行等离子体CVD法的步骤。 通过使用等离子体的各向异性特征，外延层选择性地沉积在沟槽的底部。 因此，沟槽被无空隙的外延层填充。

公开(公告)号：US20070145479A1

公开(公告)日：2007-06-28

申请号：US11645792

申请日：2006-12-27

申请人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Yoshiyuki Hattori ,  Kyoko Okada

发明人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Yoshiyuki Hattori ,  Kyoko Okada

IPC分类号： H01L29/76

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/36

摘要： A semiconductor device includes: two main electrodes; multiple first regions; and multiple second regions. The first region having a first impurity concentration and a first width and the second region having a second impurity concentration and a second width are alternately repeated. A product of the first impurity concentration and the first width is equal to a product of the second impurity concentration and the second width. The first width is equal to or smaller than 4.5 μm. The first impurity concentration is lower than a predetermined concentration satisfying a RESURF condition. A ratio between on-state resistances of the device at 27° C. and at 150° C. is smaller than 1.8.

摘要翻译： 半导体器件包括：两个主电极; 多个第一区域; 和多个第二区域。 交替重复具有第一杂质浓度和第一宽度的第一区域和具有第二杂质浓度和第二宽度的第二区域。 第一杂质浓度和第一宽度的乘积等于第二杂质浓度与第二宽度的乘积。 第一宽度等于或小于4.5μm。 第一杂质浓度低于满足RESURF条件的预定浓度。 器件在27°C和150°C的导通电阻之间的比值小于1.8。

公开(公告)号：US20060218916A1

公开(公告)日：2006-10-05

申请号：US11392481

申请日：2006-03-29

申请人： Teruhisa Ando ,  Nobuaki Shimizu ,  Masahiro Tsunemi ,  Hitoshi Yamaguchi

发明人： Teruhisa Ando ,  Nobuaki Shimizu ,  Masahiro Tsunemi ,  Hitoshi Yamaguchi

IPC分类号： F16D31/02

CPC分类号： E02F9/2267 ,  E02F9/123 ,  E02F9/2221 ,  E02F9/2275

摘要： Provided is a driving motor controlling device of a construction machine, including a driving motor which is included in the construction machine having a swivel joint interposed between an upper body and a lower body, and is connected to a pump and a tank through the swivel joint, and a motor control valve which switches a state for connecting the pump and the tank to the driving motor such that the driving motor is controlled to a stop state, a normal rotation state, or a reverse rotation state, wherein the motor control valve has a neutral position for the stop state, a normal rotation position for the normal rotation state, and a reverse rotation position for the reverse rotation state, and is switched to the neutral position, the normal rotation position, or the reverse rotation position, based on a command from a control device manipulated by a operator and a pressure of an inflow side of hydraulic oil into the driving motor, wherein the motor control valve is disposed in the lower body in which the driving motor is disposed, and is integrally formed with the driving motor, and wherein, upon a warming up operation, the hydraulic oil discharged from the pump is circulated to the tank disposed in the upper body through the swivel joint and the motor control valve.

公开(公告)号：US07112519B2

公开(公告)日：2006-09-26

申请号：US10950526

申请日：2004-09-28

申请人： Hitoshi Yamaguchi ,  Yoshiyuki Hattori

发明人： Hitoshi Yamaguchi ,  Yoshiyuki Hattori

IPC分类号： H01L21/04

CPC分类号： H01L29/7813 ,  H01L29/0634

摘要： A semiconductor device includes: an n+ type drain region; an n type drift region that connects with the n+ type drain region; a p type body region; a n+ type source region that connects with the p type body region; and a gate electrode that is provided, with being covered by a gate insulation film, in a gate trench that penetrates the p type body region. The semiconductor further includes: a p type silicon region that adjoins the n type drift region; and an n type silicon region provided in a region almost including a carrier passage that connects the n type drift region and the p type body region. Here, the p type silicon region and the p type body region directly connect with each other.

摘要翻译： 半导体器件包括：n + +型漏区; 与n + +型漏极区域连接的n型漂移区域; p型体区; 与p型体区域连接的n + SUP +型源极区域; 以及栅极电极，其被栅极绝缘膜覆盖在穿过p​​型体区域的栅极沟槽中。 半导体还包括：邻接n型漂移区的p型硅区; 以及设置在几乎包括连接n型漂移区域和p型体区域的载体通道的区域中的n型硅区域。 这里，p型硅区域和p型体区域直接连接。

公开(公告)号：US20060170037A1

公开(公告)日：2006-08-03

申请号：US10549151

申请日：2004-08-20

申请人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Takashi Suzuki ,  Kyoko Nakashima

发明人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Takashi Suzuki ,  Kyoko Nakashima

IPC分类号： H01L29/94

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/7813

摘要： In a vertical type MOSFET device having a super junction structure, in which a N conductive type column region (2) and a P conductive type column region (3) are alternately aligned, regarding to a distance between a terminal end (17) of an active region (13) and a terminal end (16) of a column region (4), the terminal end (16) of the column region (4) is disposed at a position, which is separated from the active region terminal end (17) by a distance obtained by subtracting a half of a width of the N conductive type column region (2) from a distance corresponding to a depth of the column region (4). Thus, an electric field concentration at a specific portion in a region facing a narrow side of the column structure is prevented so that a breakdown voltage of the vertical type MOSFET is improved.

摘要翻译： 在具有超结结构的垂直型MOSFET器件中，其中N导电型列区域（2）和P导电型列区域（3）交替对准，关于距离 活性区域（13）和列区域（4）的末端（16），列区域（4）的末端（16）设置在与有源区域终端（17）分离的位置 ）通过从对应于列区域（4）的深度的距离减去N导电型列区域（2）的宽度的一半而获得的距离。 因此，防止了在列结构的窄边的区域中的特定部分处的电场浓度，从而提高了垂直型MOSFET的击穿电压。

公开(公告)号：US20060138407A1

公开(公告)日：2006-06-29

申请号：US11356984

申请日：2006-02-21

申请人： Hitoshi Yamaguchi ,  Mikimasa Suzuki ,  Yoslhiyuki Hattori

发明人： Hitoshi Yamaguchi ,  Mikimasa Suzuki ,  Yoslhiyuki Hattori

IPC分类号： H01L29/08 ,  H01L35/24

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/1095

摘要： A semiconductor device includes a body region, a drift region having a first part and a second part, and a trench gate electrode. The body region is disposed on the drift region. The first and second parts extend in an extending direction so that the second part is adjacent to the first part. The trench gate electrode penetrates the body region and reaches the drift region so that the trench gate electrode faces the body region and the drift region through an insulation layer. The trench gate electrode extends in a direction crossing with the extending direction of the first and second parts. The first part includes a portion near the trench gate electrode, which has an impurity concentration equal to or lower than that of the body region.

摘要翻译： 半导体器件包括主体区域，具有第一部分和第二部分的漂移区域以及沟槽栅电极。 身体区域设置在漂移区域上。 第一和第二部分沿延伸方向延伸，使得第二部分与第一部分相邻。 沟槽栅电极穿透体区并到达漂移区，使得沟槽栅电极通过绝缘层面向体区和漂移区。 沟槽栅电极沿与第一和第二部分的延伸方向交叉的方向延伸。 第一部分包括沟槽栅电极附近的部分，其杂质浓度等于或低于体区的杂质浓度。

公开(公告)号：US07037789B2

公开(公告)日：2006-05-02

申请号：US10449057

申请日：2003-06-02

申请人： Shoichi Yamauchi ,  Hitoshi Yamaguchi

发明人： Shoichi Yamauchi ,  Hitoshi Yamaguchi

IPC分类号： H01L21/76

CPC分类号： H01L29/7813 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02658 ,  H01L29/0634

摘要： A method for manufacturing a semiconductor device includes: forming a trench in a predetermined layer of a semiconductor substrate; heating the substrate having the trench in a non-oxidizing and non-nitridizing atmosphere containing a dopant or a compound that includes the dopant in order to smooth the surfaces defining the trench and to maintain the dopant concentration in the predetermined layer to be a predetermined concentration before the heating is treated; and forming an epitaxially grown film to fill the trench. The conductivity type of the dopant contained in the non-oxidizing and non-nitridizing atmosphere is the same as that of the dopant initially contained in the predetermined layer.

公开(公告)号：US20050045996A1

公开(公告)日：2005-03-03

申请号：US10950423

申请日：2004-09-28

申请人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Jun Sakakibara ,  Nobuhiro Tsuji

发明人： Shoichi Yamauchi ,  Hitoshi Yamaguchi ,  Jun Sakakibara ,  Nobuhiro Tsuji

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L29/04 ,  H01L29/06 ,  H01L29/12 ,  H01L29/423 ,  H01L29/78 ,  H01L21/332 ,  H01L31/036

CPC分类号： H01L29/781 ,  H01L29/045 ,  H01L29/0634 ,  H01L29/4232 ,  H01L29/4238 ,  H01L29/66674 ,  H01L29/7801 ,  H01L29/7813

摘要： A semiconductor device includes a semiconductor substrate and a semiconductor layer. The semiconductor substrate has a main surface that is an Si{100} surface. The substrate has a trench in the main surface. The semiconductor layer is located on surfaces defining the trench to have common crystallographic planes with the semiconductor substrate. The trench is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other. The bottom surface and the long sidewall surfaces are Si{100} surfaces.

摘要翻译： 半导体器件包括半导体衬底和半导体层。 半导体衬底具有作为Si {100}表面的主表面。 基板在主表面具有沟槽。 半导体层位于限定沟槽的表面上，以与半导体衬底具有共同的结晶平面。 沟槽由底面，彼此面对的两个长侧壁表面和彼此相对的两个短侧壁表面限定。 底表面和长侧壁表面是Si {100}表面。

公开(公告)号：US06696323B2

公开(公告)日：2004-02-24

申请号：US10340746

申请日：2003-01-13

申请人： Hitoshi Yamaguchi ,  Toshio Sakakibara ,  Jun Sakakibara ,  Takumi Shibata ,  Toshiyuki Morishita

发明人： Hitoshi Yamaguchi ,  Toshio Sakakibara ,  Jun Sakakibara ,  Takumi Shibata ,  Toshiyuki Morishita

IPC分类号： H01L21332

CPC分类号： H01L29/7813 ,  H01L29/04 ,  H01L29/045 ,  H01L29/0696 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/66348 ,  H01L29/66378 ,  H01L29/66659 ,  H01L29/66704 ,  H01L29/66734 ,  H01L29/66787 ,  H01L29/7393 ,  H01L29/7397 ,  H01L29/749 ,  H01L29/78 ,  H01L29/7803 ,  H01L29/7809 ,  H01L29/7816 ,  H01L29/7817 ,  H01L29/7824 ,  H01L29/7825 ,  H01L29/7828 ,  H01L29/7835

摘要： In a semiconductor device, a p-type base region is provided in an n−-type substrate to extend from a principal surface of the substrate in a perpendicular direction to the principal surface. An n+-type source region extends in the p-type base region from the principal surface in the perpendicular direction, and an n+-type drain region extends in the substrate separately from the p-type base region with a drift region interposed therebetween. A trench is formed to penetrate the p-type base region from the n+-type source region in a direction parallel to the principal surface. A gate electrode is formed in the trench through a gate insulating film. Accordingly, a channel region can be formed with a channel width in a depth direction of the trench when a voltage is applied to the gate electrode.

摘要翻译： 在半导体器件中，p型基极区域设置在n型衬底中，从衬底的主表面沿垂直于主表面的方向延伸。 n +型源极区域在垂直方向上从主表面在p型基极区域中延伸，并且n +型漏极区域在p型基极区域中与p型基极区域分开延伸， 漂移区域。 形成沟槽，以在平行于主表面的方向上从n +型源极区域穿透p型基极区域。 栅电极通过栅极绝缘膜形成在沟槽中。 因此，当向栅电极施加电压时，可以在沟槽的深度方向上形成沟道区域。

公开(公告)号：US5661150A

公开(公告)日：1997-08-26

申请号：US249249

申请日：1994-05-25

申请人： Yasufumi Shirasaki ,  Hitoshi Yamaguchi

发明人： Yasufumi Shirasaki ,  Hitoshi Yamaguchi

IPC分类号： A61K9/20 ,  A61K31/00 ,  A61K31/415 ,  A61K31/496 ,  A61K38/01 ,  A61K31/495

CPC分类号： A61K31/496 ,  A61K31/00 ,  A61K31/415

摘要： A drug containing a calmodulin inhibitor as an active ingredient is disclosed. This drug is useful in the suppression of neuronal cell death, in particular brain neuronal cell death, due to, for example, cerebral ischemia.Also, a drug containing a compound capable of inhibiting binding of calmodulin to a cytoskeltal protein as an active ingredient and a drug containing a compound suppressing the breakdown of a cytoskeltal protein as an active ingredient are disclosed.These drugs are useful in the treatment and prevention of various diseases in the brain and sequelae thereof as well as in the prevention of relapses of these diseases.

摘要翻译： 公开了含有钙调蛋白抑制剂作为活性成分的药物。 由于例如脑缺血，该药物可用于抑制神经元细胞死亡，特别是脑神经元细胞死亡。 另外，公开了含有抑制钙调蛋白与胞质蛋白结合作为活性成分的化合物的药物和含有抑制细胞分裂蛋白作为活性成分的化合物的药物。 这些药物可用于治疗和预防脑及其后遗症中的各种疾病以及预防这些疾病的复发。