公开(公告)号：US20210104605A1

公开(公告)日：2021-04-08

申请号：US16595375

申请日：2019-10-07

Applicant: Infineon Technologies AG

Inventor： Michael Hell ,  Rudolf Elpelt ,  Caspar Leendertz ,  Dethard Peters

IPC: H01L29/167 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78

Abstract: A SiC substrate of a semiconductor device includes: a drift region of a first conductivity type; a body region of a second conductivity type having a channel region which adjoins a first surface of the SiC substrate; a source region of the first conductivity type adjoining a first end of the channel region; an extension region of the first conductivity type at an opposite side of the body region as the source region and vertically extending to the drift region; a buried region of the second conductivity type below the body region and having a tail which extends toward the first surface and adjoins the extension region; and a compensation region of the first conductivity type protruding from the extension region into the body region along the first surface and terminating at a second end of the channel region opposite the first end.

公开(公告)号：US10896952B2

公开(公告)日：2021-01-19

申请号：US16797463

申请日：2020-02-21

Applicant: Infineon Technologies AG

Inventor： Thomas Aichinger ,  Wolfgang Bergner ,  Paul Ellinghaus ,  Rudolf Elpelt ,  Romain Esteve ,  Florian Grasse ,  Caspar Leendertz ,  Shiqin Niu ,  Dethard Peters ,  Ralf Siemieniec ,  Bernd Zippelius

IPC: H01L29/06 ,  H01L29/16 ,  H01L21/265 ,  H01L29/423 ,  H01L29/66 ,  H01L27/088

Abstract: A semiconductor device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. A trench interval which defines a space between adjacent gate trenches extends in a second direction perpendicular to the first direction. Source regions of a first conductivity type formed in the SiC substrate occupy a first part of the space between adjacent gate trenches. Body regions of a second conductivity type opposite the first conductivity type formed in the SiC substrate and below the source regions occupy a second part of the space between adjacent gate trenches. Body contact regions of the second conductivity type formed in the SiC substrate occupy a third part of the space between adjacent gate trenches. Shielding regions of the second conductivity type formed deeper in the SiC substrate than the body regions adjoin a bottom of at least some of the gate trenches.

公开(公告)号：US10586845B1

公开(公告)日：2020-03-10

申请号：US16193296

申请日：2018-11-16

Applicant: Infineon Technologies AG

Inventor： Thomas Aichinger ,  Wolfgang Bergner ,  Paul Ellinghaus ,  Rudolf Elpelt ,  Romain Esteve ,  Florian Grasse ,  Caspar Leendertz ,  Shiqin Niu ,  Dethard Peters ,  Ralf Siemieniec ,  Bernd Zippelius

IPC: H01L29/06 ,  H01L29/16 ,  H01L21/265 ,  H01L29/423 ,  H01L29/66 ,  H01L27/088

Abstract: According to an embodiment of a semiconductor device, the device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. Rows of source regions of a first conductivity type are formed in the SiC substrate and extend lengthwise in parallel in a second direction which is transverse to the first direction. Rows of body regions of a second conductivity type opposite the first conductivity type are formed in the SiC substrate below the rows of source regions. Rows of body contact regions of the second conductivity type are formed in the SiC substrate. The rows of body contact regions extend lengthwise in parallel in the second direction. First shielding regions of the second conductivity type are formed deeper in the SiC substrate than the rows of body regions.

公开(公告)号：US10541325B2

公开(公告)日：2020-01-21

申请号：US16171911

申请日：2018-10-26

Applicant: Infineon Technologies AG

Inventor： Rudolf Elpelt ,  Roland Rupp ,  Reinhold Schoerner ,  Larissa Wehrhahn-Kilian ,  Bernd Zippelius

IPC: H01L21/04 ,  H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/861 ,  H01L29/16

Abstract: In termination regions of a silicon carbide substrate field zones are formed by ion implantation. By laterally modulating a distribution of dopants entering the silicon carbide substrate by the ion implantation, a horizontal net dopant distribution in the field zones is set to fall from a maximum net dopant concentration Nmax to Nmax/e within at least 200 nm, with e representing Euler's number. The field zones form first pn junctions with a drift layer.

公开(公告)号：US10120287B2

公开(公告)日：2018-11-06

申请号：US15249758

申请日：2016-08-29

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Rudolf Elpelt ,  Romain Esteve

IPC: G03F7/20 ,  H01L21/027 ,  H01L23/544 ,  H01L29/06 ,  H01L29/16 ,  H01L29/36 ,  H01L21/04 ,  H01L29/66

Abstract: A beam modifier device is provided that includes scattering portions in which particles vertically impinging on an exposure surface of the beam modifier device are deflected from a vertical direction. A total permeability for the particles changes along a lateral direction parallel to the exposure surface.

公开(公告)号：US09496346B2

公开(公告)日：2016-11-15

申请号：US14974553

申请日：2015-12-18

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Christian Hecht ,  Jens Konrath ,  Wolfgang Bergner ,  Hans-Joachim Schulze ,  Rudolf Elpelt

IPC: H01L29/15 ,  H01L29/16 ,  H01L21/04 ,  H01L29/66 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L29/78 ,  H01L29/06 ,  H01L29/872

CPC classification number: H01L29/1608 ,  H01L21/045 ,  H01L21/046 ,  H01L21/047 ,  H01L21/0495 ,  H01L21/565 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3135 ,  H01L23/3171 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/7811 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A silicon carbide device includes a silicon carbide substrate, an inorganic passivation layer structure and a molding material layer. The inorganic passivation layer structure laterally covers at least partly a main surface of the silicon carbide substrate and the molding material layer is arranged adjacent to the inorganic passivation layer structure.

公开(公告)号：US12119377B2

公开(公告)日：2024-10-15

申请号：US17505716

申请日：2021-10-20

Applicant: Infineon Technologies AG

Inventor： Michael Hell ,  Rudolf Elpelt ,  Caspar Leendertz

IPC: H01L29/06 ,  H01L21/04 ,  H01L21/76 ,  H01L21/761 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78 ,  H01L29/808 ,  H01L29/872

CPC classification number: H01L29/0634 ,  H01L21/0465 ,  H01L21/049 ,  H01L21/0495 ,  H01L21/7602 ,  H01L21/761 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/7813 ,  H01L29/8083 ,  H01L29/872

Abstract: A semiconductor device includes: a SiC substrate; a device structure in or on the SiC substrate and subject to an electric field during operation of the semiconductor device; a current-conduction region of a first conductivity type in the SiC substrate adjoining the device structure; and a shielding region of a second conductivity type laterally adjacent to the current-conduction region and configured to at least partly shield the device structure from the electric field. The shielding region has a higher net doping concentration than the current-conduction region, and has a length (L) measured from a first position which corresponds to a bottom of the device structure to a second position which corresponds to a bottom of the shielding region. The current-conduction region has a width (d) measured between opposing lateral sides of the current-conduction region, and L/d is in a range of 1 to 10.

公开(公告)号：US11888032B2

公开(公告)日：2024-01-30

申请号：US18073860

申请日：2022-12-02

Applicant: Infineon Technologies AG

Inventor： Caspar Leendertz ,  Thomas Basler ,  Paul Ellinghaus ,  Rudolf Elpelt ,  Michael Hell ,  Jens Peter Konrath ,  Shiqin Niu ,  Dethard Peters ,  Konrad Schraml ,  Bernd Leonhard Zippelius

IPC: H01L29/16 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78

CPC classification number: H01L29/1608 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/7813

Abstract: A method of producing a silicon carbide (SiC) device includes: forming a stripe-shaped trench gate structure that extends from a first surface of a SiC body into the SiC body, the gate structure having a gate length along a lateral first direction, a bottom surface and a first gate sidewall of the gate structure being connected via a first bottom edge of the gate structure; forming at least one source region of a first conductivity type; and forming a shielding region of a second conductivity type in contact with the first bottom edge of the gate structure across at least 20% of the gate length. Forming the shielding region includes: forming a deep shielding portion; and forming a top shielding portion between the first surface and the deep shielding portion, the top shielding portion being in contact with the first bottom edge.

公开(公告)号：US20230317797A1

公开(公告)日：2023-10-05

申请号：US18124842

申请日：2023-03-22

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Rudolf Elpelt ,  Jens Peter Konrath ,  Konrad Schraml

IPC: H01L29/16 ,  H01L29/20 ,  H01L29/78 ,  H01L29/739 ,  H01L29/66

CPC classification number: H01L29/1608 ,  H01L29/2003 ,  H01L29/7802 ,  H01L29/7395 ,  H01L29/66712 ,  H01L29/66333 ,  H01L29/66068

Abstract: A wide band gap semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface along a vertical direction. The semiconductor device further includes a first region of a first conductivity type adjoining at least partially the first surface, a drift region of a second conductivity type, a highly doped second region adjoining the second surface, and a buffer region of the second conductivity type arranged between the drift region and the highly doped second region. A vertical profile of a doping concentration of the buffer region includes at least one step in a first section and is increasing approximately exponentially toward the second surface in a second section. The first section is arranged between the second section and the highly doped second region.

公开(公告)号：US11462611B2

公开(公告)日：2022-10-04

申请号：US17111551

申请日：2020-12-04

Applicant: Infineon Technologies AG

Inventor： Thomas Aichinger ,  Wolfgang Bergner ,  Paul Ellinghaus ,  Rudolf Elpelt ,  Romain Esteve ,  Florian Grasse ,  Caspar Leendertz ,  Shiqin Niu ,  Dethard Peters ,  Ralf Siemieniec ,  Bernd Zippelius

IPC: H01L29/06 ,  H01L21/265 ,  H01L29/16 ,  H01L29/423 ,  H01L29/66 ,  H01L27/088

Abstract: A semiconductor device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. A trench interval which defines a space between adjacent gate trenches extends in a second direction perpendicular to the first direction. Source regions of a first conductivity type formed in the SiC substrate occupy a first part of the space between adjacent gate trenches. Body regions of a second conductivity type opposite the first conductivity type formed in the SiC substrate and below the source regions occupy a second part of the space between adjacent gate trenches. Body contact regions of the second conductivity type formed in the SiC substrate occupy a third part of the space between adjacent gate trenches. Shielding regions of the second conductivity type formed deeper in the SiC substrate than the body regions adjoin a bottom of at least some of the gate trenches.