公开(公告)号：US09246099B1

公开(公告)日：2016-01-26

申请号：US14539105

申请日：2014-11-12

Applicant: Intermolecular Inc.

Inventor： Chien-Lan Hsueh ,  Randall J. Higuchi

IPC: H01L21/469 ,  H01L45/00 ,  C23C16/455

CPC classification number: C23C16/45536 ,  C23C16/45527 ,  C23C16/45544 ,  C23C16/482 ,  H01L45/04 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/16

Abstract: Compound layers, such as metal silicon nitrides, are formed by ALD or CVD from precursors with incompatible reaction temperature ranges. The substrate is held at a temperature within the lower reaction temperature range (e.g., that of a metal precursor). The low-temperature precursor and its reactant react to form an ALD monolayer or thin CVD layer. The high-temperature precursor and its reactant are pulsed in the chamber, and the substrate is irradiated with ultraviolet light. The ultraviolet light adds energy to the system to overcome the reaction barrier despite the substrate temperature being below the minimum reaction temperature of the high-temperature precursor.

Abstract translation: 化合物层，例如金属氮化硅，通过ALD或CVD由不相容的反应温度范围的前体形成。 将基板保持在较低反应温度范围内的温度（例如，金属前体的温度）。 低温前体及其反应物反应形成ALD单层或薄CVD层。 将高温前体及其反应物在室中脉冲，并用紫外光照射基板。 尽管衬底温度低于高温前体的最低反应温度，但紫外光能够向系统增加能量以克服反应势垒。

公开(公告)号：US20150170923A1

公开(公告)日：2015-06-18

申请号：US14133546

申请日：2013-12-18

Applicant: Intermolecular, Inc.

Inventor： Federico Nardi ,  Randall J. Higuchi ,  Robert A. Huertas ,  Yun Wang

IPC: H01L21/306

CPC classification number: H01L21/32134 ,  H01L21/28123 ,  H01L21/32139 ,  H01L28/20 ,  H01L29/66545

Abstract: Selective wet etching is used to produce feature sizes of reduced width in semiconductor devices. An initial patterning step (e.g., photolithography) forms a pillar of an initial width from at least a selected first layer and an overlayer. A wet etchant that is selective to the selected layer undercuts the sidewalls of the selected layer to a smaller width while leaving at least part of the overlayer in place to protect the top surface of the selected layer. The selected layer becomes a narrow “stem” within the pillar, and may have dimensions below the resolution limit of the technique used for the initial patterning. For some devices, voids may be intentionally left in a fill layer around the stem for electrical or thermal insulation.

Abstract translation: 选择性湿蚀刻用于制造半导体器件中宽度减小的特征尺寸。 初始构图步骤（例如，光刻）从至少所选择的第一层和覆盖层形成初始宽度的柱。 对所选择的层选择性的湿蚀刻剂将所选层的侧壁切割成更小的宽度，同时使覆盖层的至少一部分保留在适当位置以保护所选择的层的顶表面。 所选择的层在柱内成为窄的“茎”，并且可以具有低于用于初始图案化的技术的分辨率极限的尺寸。 对于一些设备，可能有意将空隙留在阀杆周围的填充层中进行电气或绝热。

公开(公告)号：US09006026B2

公开(公告)日：2015-04-14

申请号：US14466695

申请日：2014-08-22

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Zhendong Hong ,  Vidyut Gopal ,  Imran Hashim ,  Randall J. Higuchi ,  Tim Minvielle ,  Hieu Pham ,  Takeshi Yamaguchi

IPC: H01L21/00 ,  H01L21/8222 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/146 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616

Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.

Abstract translation: 本发明的实施例一般涉及用于制造这种存储器件的非易失性存储器件和方法。 用于形成改进的存储器件（例如ReRAM单元）的方法提供优化的原子层沉积（ALD）工艺，用于形成金属氧化物膜堆叠，其包含至少一个硬金属氧化物膜（例如，金属被完全氧化或基本上被氧化 ）和至少一种软金属氧化物膜（例如，金属比硬金属氧化物氧化较少）。 由于软金属氧化物膜比硬金属氧化物膜氧化得更少或更金属，所以软金属氧化物膜的电阻小于硬金属氧化物膜。 在一个实例中，通过利用臭氧作为氧化剂的ALD工艺形成硬质金属氧化物膜，而通过利用水蒸汽作为氧化剂的另一ALD工艺形成软金属氧化物膜。

公开(公告)号：US20140264223A1

公开(公告)日：2014-09-18

申请号：US13835256

申请日：2013-03-15

Applicant: INTERMOLECULAR INC. ,  KABUSHIKI KAISHA TOSHIBA ,  SANDISK 3D LLC

Inventor： Mihir Tendulkar ,  Randall J. Higuchi ,  Chien-Lan Hsueh

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/165 ,  H01L27/2409 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1616 ,  H01L45/1625

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A ReRAM cell includes an embedded resistor and resistive switching layer connected in series. The embedded resistor prevents excessive electrical currents through the resistive switching layer, especially when the resistive switching layer is switched into its low resistive state, thereby preventing over-programming. The embedded resistor includes aluminum, nitrogen, and one or more additional metals (other than aluminum). The concentration of each component is controlled to achieve desired resistivity and stability of the embedded resistor. In some embodiments, the resistivity ranges from 0.1 Ohm-centimeter to 40 Ohm-centimeter and remains substantially constant while applying an electrical field of up 8 mega-Volts/centimeter to the embedded resistor. The embedded resistor may be made from an amorphous material, and the material is operable to remain amorphous even when subjected to typical annealing conditions.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 ReRAM单元包括串联连接的嵌入式电阻和电阻开关层。 嵌入式电阻器阻止通过电阻开关层的过多电流，特别是当电阻式开关层切换到其低电阻状态时，从而防止过度编程。 嵌入式电阻器包括铝，氮和一种或多种另外的金属（除铝以外）。 控制每个组分的浓度以实现嵌入式电阻器的期望的电阻率和稳定性。 在一些实施例中，电阻率范围为0.1欧姆至40欧姆厘米，并且在施加高达8兆伏特/厘米的电场到嵌入式电阻器时保持基本恒定。 嵌入式电阻器可以由非晶材料制成，并且即使经受典型的退火条件，该材料也可操作以保持非晶态。

公开(公告)号：US20140175361A1

公开(公告)日：2014-06-26

申请号：US13721406

申请日：2012-12-20

Applicant: Intermolecular Inc. ,  SanDisk 3D LLC ,  Kabushiki Kaisha Toshiba

Inventor： Chien-Lan Hsueh ,  Randall J. Higuchi ,  Tim Minvielle ,  Jinhong Tong ,  Yun Wang ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/08 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616

Abstract: Provided are resistive random access memory (ReRAM) cells having switching layers that include hafnium, aluminum, oxygen, and nitrogen. The composition of such layers is designed to achieve desirable performance characteristics, such as low current leakage as well as low and consistent switching currents. In some embodiments, the concentration of nitrogen in a switching layer is between about 1 and 20 atomic percent or, more specifically, between about 2 and 5 atomic percent. Addition of nitrogen helps to control concentration and distribution of defects in the switching layer. Also, nitrogen as well as a combination of two metals helps with maintaining this layer in an amorphous state. Excessive amounts of nitrogen reduce defects in the layer such that switching characteristics may be completely lost. The switching layer may be deposited using various techniques, such as sputtering or atomic layer deposition (ALD).

Abstract translation: 提供了具有包括铪，铝，氧和氮的开关层的电阻随机存取存储器（ReRAM）单元。 这些层的组成被设计成实现期望的性能特性，例如低电流泄漏以及低和一致的开关电流。 在一些实施方案中，开关层中氮的浓度在约1至20原子百分比之间，或更具体地在约2至5原子百分比之间。 添加氮有助于控制开关层缺陷的浓度和分布。 此外，氮气以及两种金属的组合有助于将该层保持在非晶状态。 过量的氮减少了层中的缺陷，使得开关特性可能完全丧失。 可以使用诸如溅射或原子层沉积（ALD）的各种技术来沉积切换层。

公开(公告)号：US09018037B1

公开(公告)日：2015-04-28

申请号：US14098263

申请日：2013-12-05

Applicant: Intermolecular, Inc.

Inventor： Federico Nardi ,  Randall J. Higuchi ,  Robert A. Huertas ,  Yun Wang

IPC: H01L29/02 ,  H01L45/00

CPC classification number: H01L45/08 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1666

Abstract: Forming a resistive switching layer having a vertical interface can generate defects confined along the interface between two electrodes. The confined defects can form a pre-determined region for filament formation and dissolution, leading to low power resistive switching and low program voltage or current variability. In addition, the filament forming process of the resistive memory device can be omitted due to the existence of the confined defects.

Abstract translation: 形成具有垂直接口的电阻式开关层可以产生沿着两个电极之间的界面限制的缺陷。 限制缺陷可以形成用于灯丝形成和溶解的预定区域，导致低功率电阻切换和低编程电压或电流变化。 此外，由于限制缺陷的存在，可以省略电阻式存储器件的灯丝形成工艺。

公开(公告)号：US08969129B2

公开(公告)日：2015-03-03

申请号：US14464171

申请日：2014-08-20

Applicant: Intermolecular Inc.

Inventor： Chien-Lan Hsueh ,  Randall J. Higuchi ,  Mihir Tendulkar

IPC: H01L29/02 ,  H01L45/00 ,  H01L27/24

CPC classification number: C23C14/345 ,  C23C14/0042 ,  C23C14/0641 ,  C23C14/083 ,  C23C14/225 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A ReRAM cell includes an embedded resistor and a resistive switching layer connected in series with this resistor. The resistor is configured to prevent over-programming of the cell by limiting electrical currents through the resistive switching layer. Unlike the resistive switching layer, which changes its resistance in order to store data, the embedded resistor maintains a substantially constant resistance during operation of the cell. The embedded resistor is formed from tantalum nitride and silicon nitride. The atomic ratio of tantalum and silicon may be specifically selected to yield resistors with desired densities and resistivities as well as ability to remain amorphous when subjected to various annealing conditions. The embedded resistor may also function as a diffusion barrier layer and prevent migration of components between one of the electrodes and the resistive switching layer.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 ReRAM单元包括与该电阻器串联连接的嵌入式电阻器和电阻开关层。 电阻器被配置为通过限制通过电阻式开关层的电流来防止电池的过度编程。 与电阻开关层不同，为了存储数据而改变其电阻，嵌入式电阻器在电池工作期间保持基本恒定的电阻。 嵌入式电阻器由氮化钽和氮化硅形成。 可以特别地选择钽和硅的原子比以产生具有所需密度和电阻率的电阻器以及当经受各种退火条件时保持非晶体的能力。 嵌入式电阻器还可以用作扩散阻挡层并且防止元件在电极和电阻开关层中的一个之间的迁移。

公开(公告)号：US20140377931A1

公开(公告)日：2014-12-25

申请号：US14480025

申请日：2014-09-08

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Mihir Tendulkar ,  Randall J. Higuchi ,  Chien-Lan Hsueh

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/165 ,  H01L27/2409 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1616 ,  H01L45/1625

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A ReRAM cell includes an embedded resistor and resistive switching layer connected in series. The embedded resistor prevents excessive electrical currents through the resistive switching layer, especially when the resistive switching layer is switched into its low resistive state, thereby preventing over-programming. The embedded resistor includes aluminum, nitrogen, and one or more additional metals (other than aluminum). The concentration of each component is controlled to achieve desired resistivity and stability of the embedded resistor. In some embodiments, the resistivity ranges from 0.1 Ohm-centimeter to 40 Ohm-centimeter and remains substantially constant while applying an electrical field of up 8 mega-Volts/centimeter to the embedded resistor. The embedded resistor may be made from an amorphous material, and the material is operable to remain amorphous even when subjected to typical annealing conditions.

公开(公告)号：US20140322884A1

公开(公告)日：2014-10-30

申请号：US13869800

申请日：2013-04-24

Applicant: Intermolecular Inc.

Inventor： Randall J. Higuchi ,  Chien-Lan Hsueh ,  Yun Wang

IPC: H01L45/00

CPC classification number: H01L27/2463 ,  H01L21/0228 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/1616

Abstract: A nonvolatile resistive memory element includes a novel switching layer and methods of forming the same. The switching layer includes a material having bistable resistance properties and formed by bonding silicon to oxygen or nitrogen. The switching layer may include at least one of SiOx, SiOxNy, or SiNx. Advantageously, the SiOx, SiOxNy, and SiNx generally remain amorphous after thermal anneal processes are used to form the devices, such as ReRAM devices.

Abstract translation: 非易失性电阻性存储元件包括新颖的开关层及其形成方法。 开关层包括具有双稳电阻性质并通过将硅键合到氧或氮而形成的材料。 开关层可以包括SiO x，SiO x N y或SiN x中的至少一种。 有利地，在使用热退火工艺来形成诸如ReRAM器件的器件之后，SiO x，SiO x N y和SiN x通常保持非晶态。

公开(公告)号：US20140175360A1

公开(公告)日：2014-06-26

申请号：US13721358

申请日：2012-12-20

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Mihir Tendulkar ,  Vidyut Gopal ,  Imran Hashim ,  Randall J. Higuchi ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/146 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1625

Abstract: Provided are resistive random access memory (ReRAM) cells having bi-layered metal oxide structures. The layers of a bi-layered structure may have different compositions and thicknesses. Specifically, one layer may be thinner than the other layer, sometimes as much as 5 to 20 times thinner. The thinner layer may be less than 30 Angstroms thick or even less than 10 Angstroms thick. The thinner layer is generally more oxygen rich than the thicker layer. Oxygen deficiency of the thinner layer may be less than 5 atomic percent or even less than 2 atomic percent. In some embodiments, a highest oxidation state metal oxide may be used to form a thinner layer. The thinner layer typically directly interfaces with one of the electrodes, such as an electrode made from doped polysilicon. Combining these specifically configured layers into the bi-layered structure allows improving forming and operating characteristics of ReRAM cells.

Abstract translation: 提供了具有双层金属氧化物结构的电阻随机存取存储器（ReRAM）单元。 双层结构的层可以具有不同的组成和厚度。 具体地说，一层可以比另一层薄一些，有时可以减薄5至20倍。 较薄的层可以小于30埃厚或甚至小于10埃厚。 较薄的层通常比较厚的层富氧。 较薄层的缺氧可能小于5原子％或甚至小于2原子％。 在一些实施方案中，可以使用最高氧化态金属氧化物来形成较薄的层。 较薄的层通常直接与一个电极（例如由掺杂多晶硅制成的电极）接合。 将这些特定配置的层组合成双层结构允许改善ReRAM单元的成形和操作特性。