Method and System for Effective BGP AS-Path Pre-pending
    22.
    发明申请
    Method and System for Effective BGP AS-Path Pre-pending 审中-公开
    有效的BGP AS路径的预处理方法和系统

    公开(公告)号:US20130132542A1

    公开(公告)日:2013-05-23

    申请号:US13300372

    申请日:2011-11-18

    申请人: Ying Zhang

    发明人: Ying Zhang

    IPC分类号: G06F15/173

    CPC分类号: H04L45/04 H04L45/02 H04L45/12

    摘要: A method implemented in a network element to determine an autonomous system (AS) path pre-pending (ASPP) vector for an AS of the network element that accounts for AS business relationship induced policies and global impact of ASPP decisions by using comparable paths between AS in a network for application of network management strategies, the comparable paths grouped by path types defined by local preference polices, the method including gathering AS level topological data for the network, categorizing AS link relationships in the topological data, computing the comparable paths for each AS pair, and applying any one of a load balancing process, back-up path provisioning process or traversal avoidance process to the comparable paths to determine an ASPP vector for the AS of the network element.

    摘要翻译: 在网络元件中实现的一种方法,用于确定AS业务关系的网络元素的AS的自治系统(AS)路径预悬(ASPP)向量,从而通过使用AS之间的可比路径来引起ASPP决策的策略和全局影响 在应用网络管理策略的网络中,由本地优选策略定义的路径类型分组的可比较路径,该方法包括收集网络的AS级拓扑数据,对拓扑数据中的AS链路关系进行分类,计算每个 AS对,并将负载平衡过程,备用路径提供过程或遍历避免过程中的任何一个应用于可比较的路径,以确定网元的AS的ASPP向量。

    Implementing OSPF in Split-Architecture Networks
    24.
    发明申请
    Implementing OSPF in Split-Architecture Networks 有权
    在分布式架构网络中实现OSPF

    公开(公告)号:US20130039214A1

    公开(公告)日:2013-02-14

    申请号:US13208251

    申请日:2011-08-11

    IPC分类号: H04L12/28

    摘要: A method is implemented in a network element that functions as one of a plurality of controllers for one of a plurality of areas of a split architecture network. The controller provides a control plane for the area of the split architecture network where the controller is remote from a plurality of switches providing a data plane for the area of split architecture network. The controller facilitates optimized routing across the plurality of areas of the split architecture network by providing limited intra-area link cost data to other controllers of other areas of the split architecture network and to traditional routers of a network including the split architecture network. The limited intra-area link cost data provides costs of each possible shortest path traversal of the area of the controller without providing all internal link cost data.

    摘要翻译: 一种在分离架构网络的多个区域中的一个区域的多个控制器之一中起作用的网络元件中实现一种方法。 控制器为分离式架构网络的区域提供控制平面,其中控制器远离多个交换机,为分割架构网络的区域提供数据平面。 控制器通过向分裂架构网络的其他区域的其他控制器和包括分离架构网络的网络的传统路由器提供有限的区域内链路成本数据来促进跨分离架构网络的多个区域的优化路由。 有限的区域内链路成本数据提供控制器区域中每个可能的最短路径遍历的成本,而不提供所有内部链路成本数据。

    RESILIENCY-AWARE HYBRID DESIGN OF CONTROLLER-SWITCH CONNECTIVITY IN A SPLIT-ARCHITECTURE SYSTEM
    25.
    发明申请
    RESILIENCY-AWARE HYBRID DESIGN OF CONTROLLER-SWITCH CONNECTIVITY IN A SPLIT-ARCHITECTURE SYSTEM 有权
    分体式结构系统中控制器 - 开关连接的可靠性混合设计

    公开(公告)号:US20130028142A1

    公开(公告)日:2013-01-31

    申请号:US13347592

    申请日:2012-01-10

    IPC分类号: H04L12/28

    摘要: A method and apparatus for optimizing the resilience of a network using a combination of in-band and out-of-band signaling is disclosed. The metric used in the embodiment's algorithm to determine resilience is the maximum number of protected neighbors. Nodes closer to the controller are assigned a higher weight than those further from the controller because if their connection to the network is interrupted, all their downstream nodes will be affected and disconnected. Therefore, when determining a path to the controller, switches with alternate paths to the controller are preferred. Dedicated connections using out-of-band signaling are assigned to convert unprotected nodes to protected nodes thus improving the resilience of the network.

    摘要翻译: 公开了一种使用带内和带外信令的组合优化网络的弹性的方法和装置。 用于确定弹性的实施例算法中使用的度量是受保护邻居的最大数量。 更靠近控制器的节点的分配权重比控制器更多,因为如果它们与网络的连接中断,则所有下游节点都将受到影响和断开。 因此,当确定到控制器的路径时,具有到控制器的备用路径的交换机是优选的。 分配使用带外信令的专用连接将未受保护的节点转换为受保护节点,从而提高网络的弹性。

    METHOD FOR SELF ALIGNED METAL GATE CMOS
    26.
    发明申请
    METHOD FOR SELF ALIGNED METAL GATE CMOS 审中-公开
    自对准金属栅CMOS的方法

    公开(公告)号:US20130012009A1

    公开(公告)日:2013-01-10

    申请号:US13617528

    申请日:2012-09-14

    IPC分类号: H01L21/283

    摘要: A semiconductor device is formed by first providing a dual gate semiconductor device structure having FET pair precursors, which includes an nFET precursor and a pFET precursor, wherein each of the nFET precursor and the pFET precursor includes a dummy gate structure. At least one protective layer is deposited across the FET pair precursors, leaving the dummy gate structures exposed. The dummy gate structure is removed from one of the nFET precursor and the pFET precursor to create therein one of an nFET gate hole and a pFET gate hole, respectively. A fill is deposited into the formed one of the nFET gate hole and the pFET gate.

    摘要翻译: 半导体器件通过首先提供具有FET对前体的双栅极半导体器件结构形成,其包括nFET前体和pFET前体,其中nFET前体和pFET前体中的每一个包括伪栅极结构。 至少一个保护层沉积在FET对前体之间,留下伪栅极结构。 从nFET前体和pFET前体之一去除伪栅极结构,以在其中分别形成nFET栅极孔和pFET栅极孔中的一个。 填充物沉积在形成的nFET栅极孔和pFET栅极之一中。

    ENHANCING MOSFET PERFORMANCE BY OPTIMIZING STRESS PROPERTIES
    27.
    发明申请
    ENHANCING MOSFET PERFORMANCE BY OPTIMIZING STRESS PROPERTIES 审中-公开
    通过优化应力特性提高MOSFET的性能

    公开(公告)号:US20130001702A1

    公开(公告)日:2013-01-03

    申请号:US13613081

    申请日:2012-09-13

    IPC分类号: H01L27/092

    摘要: A device and method for improving performance of a transistor includes gate structures formed on a substrate having a spacing therebetween. The gate structures are formed in an operative relationship with active areas formed in the substrate. A stress liner is formed on the gate structures. An angled ion implantation is applied to the stress liner such that ions are directed at vertical surfaces of the stress liner wherein portions of the stress liner in contact with the active areas are shielded from the ions due to a shadowing effect provided by a height and spacing between adjacent structures.

    摘要翻译: 用于提高晶体管性能的器件和方法包括形成在其间具有间隔的衬底上的栅极结构。 栅极结构形成在与衬底中形成的有源区域的操作关系中。 在栅极结构上形成应力衬垫。 角度离子注入施加到应力衬垫上,使得离子被引导到应力衬垫的垂直表面,其中应力衬垫与有源区域接触的部分由于由高度和间隔提供的阴影效应而被屏蔽离子 相邻结构之间。

    High Performance Drilling Fluids with Submicron-Size Particles as the Weighting Agent
    28.
    发明申请
    High Performance Drilling Fluids with Submicron-Size Particles as the Weighting Agent 审中-公开
    具有亚微米粒子作为加重剂的高性能钻井液

    公开(公告)号:US20120277124A1

    公开(公告)日:2012-11-01

    申请号:US13545123

    申请日:2012-07-10

    申请人: Ying Zhang

    发明人: Ying Zhang

    IPC分类号: C09K8/04 C09K8/32

    摘要: Methods and compositions utilizing a drilling fluid comprising sub-micron precipitated barite having a weight average particle diameter below about 1 micron. Methods include a method comprising circulating a drilling fluid in a well bore, wherein the drilling fluid comprises: a carrier fluid; and a weighting agent that comprises sub-micron precipitated barite having a weight average particle diameter below about 1 micron are disclosed. In some embodiments, the drilling fluid may comprise an invert emulsion. In some embodiments, the sub-micron precipitated barite has a particle size distribution such that at least 10% of particles in the sub-micron precipitated barite have a diameter below about 0.2 micron, at least 50% of the particles in the of the sub-micron precipitated barite have a diameter below about 0.3 micron and at least 90% of the particles in the sub-micron precipitated barite have a diameter below about 0.5 micron.

    摘要翻译: 利用包含重均粒径低于约1微米的亚微米沉淀重晶石的钻井液的方法和组合物。 方法包括一种方法,包括使钻井液在井眼中循环,其中钻井流体包括:载体流体; 并且公开了包含重均粒径低于约1微米的亚微米沉淀重晶石的加重剂。 在一些实施例中,钻井液可以包括反相乳液。 在一些实施方案中,亚微米沉淀重晶石具有粒度分布,使得亚微米沉淀重晶石中的至少10%的颗粒具有低于约0.2微米的直径,子层中的至少50%的颗粒 - 微量沉淀重晶石的直径低于约0.3微米,并且亚微米沉淀重晶石中的至少90%的颗粒具有低于约0.5微米的直径。

    Nanowire FET with trapezoid gate structure
    29.
    发明授权
    Nanowire FET with trapezoid gate structure 有权
    具有梯形栅极结构的纳米线FET

    公开(公告)号:US08298881B2

    公开(公告)日:2012-10-30

    申请号:US12824293

    申请日:2010-06-28

    IPC分类号: H01L21/00 H01L21/84

    摘要: In one embodiment, a method of providing a nanowire semiconductor device is provided, in which the gate structure to the nanowire semiconductor device has a trapezoid shape. The method may include forming a trapezoid gate structure surrounding at least a portion of a circumference of a nanowire. The first portion of the trapezoid gate structure that is in direct contact with an upper surface of the nanowire has a first width and a second portion of the trapezoid gate structure that is in direct contact with a lower surface of the nanowire has a second width. The second width of the trapezoid gate structure is greater than the first width of the trapezoid gate structure. The exposed portions of the nanowire that are adjacent to the portion of the nanowire that the trapezoid gate structure is surrounding are then doped to provide source and drain regions.

    摘要翻译: 在一个实施例中,提供了一种提供纳米线半导体器件的方法,其中对纳米线半导体器件的栅极结构具有梯形形状。 该方法可以包括形成围绕纳米线的圆周的至少一部分的梯形栅极结构。 与纳米线的上表面直接接触的梯形栅极结构的第一部分具有与纳米线的下表面直接接触的梯形栅极结构的第一宽度和第二部分具有第二宽度。 梯形栅极结构的第二宽度大于梯形栅极结构的第一宽度。 然后,与梯形栅极结构所围绕的部分纳米线相邻的纳米线的暴露部分被掺杂以提供源区和漏区。

    Smooth and vertical semiconductor fin structure
    30.
    发明授权
    Smooth and vertical semiconductor fin structure 有权
    平滑和垂直的半导体鳍结构

    公开(公告)号:US08268729B2

    公开(公告)日:2012-09-18

    申请号:US12195691

    申请日:2008-08-21

    IPC分类号: H01L21/302 H01L21/324

    摘要: A method for processing a semiconductor fin structure is disclosed. The method includes thermal annealing a fin structure in an ambient containing an isotope of hydrogen. Following the thermal annealing step, the fin structure is etched in a crystal-orientation dependent, self-limiting, manner. The crystal-orientation dependent etch may be selected to be an aqueous solution containing ammonium hydroxide (NH4OH). The completed fin structure has smooth sidewalls and a uniform thickness profile. The fin structure sidewalls are {110} planes.

    摘要翻译: 公开了一种半导体鳍片结构的处理方法。 该方法包括在含有氢同位素的环境中对翅片结构进行热退火。 在热退火步骤之后,鳍结构被蚀刻成晶体取向的自限制的方式。 取决于晶体取向的蚀刻可以选择为含有氢氧化铵(NH 4 OH)的水溶液。 完成的翅片结构具有平滑的侧壁和均匀的厚度轮廓。 翅片结构侧壁是{110}平面。