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78 条记录 (耗时 0.028 秒)

    BATTERY SYSTEMS AND REMAINING CAPACITY MANAGEMENT SYSTEMS FOR SECONDARY BATTERY
    24.
    发明申请
    BATTERY SYSTEMS AND REMAINING CAPACITY MANAGEMENT SYSTEMS FOR SECONDARY BATTERY 有权
    电池系统和二次电池剩余容量管理系统

    公开(公告)号：US20140152267A1

    公开(公告)日：2014-06-05

    申请号：US14131571

    申请日：2012-06-07

    申请人： Yoichi Hashimoto ,  Hiroaki Ueno

    发明人： Yoichi Hashimoto ,  Hiroaki Ueno

    IPC分类号： H02J7/00

    CPC分类号： H02J7/0029 ,  H01M10/48 ,  H01M2010/4271 ,  H01M2010/4278 ,  H01M2200/00 ,  H02J7/0047 ,  H02J2007/005

    摘要： A battery system according to the present invention includes a secondary battery; a battery control unit that controls charging and discharging of said secondary battery; and a charging/discharging management unit that controls the charging and discharging of said secondary battery through said battery control unit, wherein said battery control unit, if an abnormality occurred during operation of said battery control unit, transmits remaining capacity data that represent a remaining capacity of said secondary battery that remained immediately before the abnormality occurred to said charging/discharging management unit.

    摘要翻译： 根据本发明的电池系统包括二次电池; 电池控制单元，其控制所述二次电池的充电和放电; 以及充电/放电管理单元，其通过所述电池控制单元控制所述二次电池的充电和放电，其中所述电池控制单元如果在所述电池控制单元的操作期间发生异常，则发送表示剩余容量的剩余容量数据 的所述二次电池在所述充电/放电管理单元发生异常之前立即停止。

    Scrambler and storage device using the same
    25.
    发明申请
    Scrambler and storage device using the same 审中-公开
    扰码器和使用相同的存储设备

    公开(公告)号：US20080130868A1

    公开(公告)日：2008-06-05

    申请号：US11897476

    申请日：2007-08-30

    申请人： Hiroaki Ueno

    发明人： Hiroaki Ueno

    IPC分类号： H04K1/00

    CPC分类号： H04L1/00 ,  H04L25/4906

    摘要： A scrambler that facilitates encryption of data to be recorded and a magnetic storage device using this are provided. The scrambler has a shift register of a plurality of stages and an exclusive OR circuit that finds the exclusive OR of the logic of the stages of the shift register that correspond to a single generating polynomial. The output of the exclusive OR circuit is arranged to be fed back to the initial stage of the shift register. At least this single generating polynomial is an arbitrary generating polynomial. The drive number, in binary form, that identifies the storage device, is set as the initial value of the shift register of a plurality of stages.

    摘要翻译： 提供了促进要记录的数据的加密的扰码器和使用该数据的磁存储装置。 加扰器具有多级的移位寄存器和异或电路，该异或电路找到与单个生成多项式相对应的移位寄存器的级的逻辑的异或。 异或电路的输出被布置为反馈到移位寄存器的初始阶段。 至少该单个生成多项式是任意生成多项式。 以二进制形式识别存储设备的驱动器号被设置为多级的移位寄存器的初始值。

    Error propagation detection and control method, and memory device using the same
    26.
    发明授权
    Error propagation detection and control method, and memory device using the same 失效
    误差传播检测和控制方法，以及使用其的存储器件

    公开(公告)号：US06717986B1

    公开(公告)日：2004-04-06

    申请号：US09442555

    申请日：1999-11-18

    申请人： Hiroaki Ueno

    发明人： Hiroaki Ueno

    IPC分类号： H03H730

    CPC分类号： H04L25/03057 ,  H04L2025/0349

    摘要： An error propagation detection method and apparatus for use in decision feedback equalization type detection is disclosed, with which it is possible to detect error propagation even when a specific code conversion rule is satisfied in an MDFE system. If the input signal of a comparative decider be a binary signal a(k) expressed as ±1, an error signal ev(k) expressed by ev(k)=[y(k)−Ideal y(k)] sign[a(k)] is determined using a(k−1)≠a(k+1) as an error computation condition. The error signal ev(k) thus determined is checked to see whether it exceeds a specific value. If so, the slice level of the comparative decider is controlled to a corresponding offset value.

    摘要翻译： 公开了一种在判决反馈均衡型检测中使​​用的误差传播检测方法和装置，即使在MDFE系统中满足特定代码转换规则的情况下也可以检测误差传播。 如果比较判别器的输入信号为表示为±1的二进制信号a（k），则由ev（k）= [y（k）-Ideal y（k）]表示的误差信号ev（k） （k）]使用（k-1）<> a（k + 1）作为误差计算条件来确定。 检查如此确定的误差信号ev（k）以查看其是否超过特定值。 如果是这样，则比较判定器的限幅电平被控制到相应的偏移值。

    Signal reproducing circuit adapted to head utilizing magneto-resistive effect
    27.
    发明授权
    Signal reproducing circuit adapted to head utilizing magneto-resistive effect 失效
    信号再现电路适用于磁头利用磁阻效应

    公开(公告)号：US6118611A

    公开(公告)日：2000-09-12

    申请号：US948209

    申请日：1997-10-09

    申请人： Hidekazu Shibasaki ,  Hiroaki Ueno ,  Ken Yakuwa

    发明人： Hidekazu Shibasaki ,  Hiroaki Ueno ,  Ken Yakuwa

    IPC分类号： G11B5/00 ,  G11B5/02 ,  G11B19/02 ,  G11B5/09

    CPC分类号： G11B5/02 ,  G11B19/02 ,  G11B2005/0016 ,  G11B2005/0018

    摘要： A signal reproducing circuit for a magneto-resistive effect head includes a constant current source for supplying a sense current to an MR head in a read state, first constant current sources for supplying first constant currents to a pair of reproduction transistors in the read state, and a capacitor connected between the emitters of the transistors. Furthermore, second constant current sources for supplying second constant currents are connected in parallel with the first constant current sources. Control is given so that when switching an idle state to the read state is commanded, the second constant current sources remain on for a given period of time. Owing to this circuitry, a transient period during which the idle state is switched to the read state or a transient period during which heads are switched in the read state can be shortened to a great extent. Consequently, superposition of an unwanted offset component on a reproduced signal can be suppressed, and a loss in data-handling capacity can be minimized.

    摘要翻译： 用于磁阻效应头的信号再现电路包括用于在读取状态下向MR磁头提供感测电流的恒流源，用于在读取状态下向一对再现晶体管提供第一恒定电流的第一恒定电流源， 以及连接在晶体管的发射极之间的电容器。 此外，用于提供第二恒定电流的第二恒流源与第一恒定电流源并联连接。 给出控制，使得当将空闲状态切换到读取状态时，第二恒定电流源保持打开一段给定的时间。 由于该电路，可以在很大程度上缩短空闲状态切换到读取状态的过渡时段或读取状态期间磁头切换的过渡时段。 因此，可以抑制再现信号上的不需要的偏移分量的叠加，并且可以最小化数据处理能力的损失。

    Terminal device for editing document and communicating data
    29.
    发明授权
    Terminal device for editing document and communicating data 失效
    用于编辑文档和通信数据的终端设备

    公开(公告)号：US4716543A

    公开(公告)日：1987-12-29

    申请号：US453024

    申请日：1982-12-27

    申请人： Toshiya Ogawa ,  Hiroaki Ueno ,  Toshiaki Yamada ,  Tomoyuki Haganuma

    发明人： Toshiya Ogawa ,  Hiroaki Ueno ,  Toshiaki Yamada ,  Tomoyuki Haganuma

    IPC分类号： B41J29/15 ,  G06F3/023 ,  G06F3/0489 ,  G06F3/00

    CPC分类号： G06F3/0489 ,  B41J29/15 ,  Y10S707/99956

    摘要： A terminal device capable of preparing a document and communicating data includes a system control section having storage means in which are resident a control program for outputting received document data either to an output section or an external storage, and a supervisor program for alternately practicing the control program and another program necessary for system control. Based on these resident programs, the system control is practiced to permit received document data to be fed to the output section or the external storage even when local work such as preparation of a document is under way. When printing operation is disabled due to a failure in a printer of the output section or the like after the received document data has been loaded in a memory of the communication control, the document data is immediately delivered to the external storage to open the document data storage area. Power is supplied only to the equipments which are indispensable for storing received document data in the memory, except for the duration of any local work such as preparation of document data.

    摘要翻译： 能够准备文件和通信数据的终端装置包括具有存储装置的系统控制部分，其中驻留有用于将接收的文件数据输出到输出部分或外部存储器的控制程序，以及用于交替执行控制的主管程序 程序和系统控制所需的另一个程序。 基于这些驻留程序，即使在诸如准备文档的本地工作正在进行时，也实行系统控制以允许接收到的文档数据被馈送到输出部分或外部存储器。 在接收到的文档数据已经被加载到通信控制的存储器中之后，由于输出部分的打印机的故障而禁用打印操作时，立即将文档数据传送到外部存储器以打开文档数据 储藏区域。 只有在将接收到的文档数据存储在存储器中所必需的设备供电时，除了准备文档数据之外的任何本地工作的持续时间。

    Storage apparatus and method for processing recording compensation
    30.
    发明授权
    Storage apparatus and method for processing recording compensation 失效
    用于处理记录补偿的存储装置和方法

    公开(公告)号：US07821729B2

    公开(公告)日：2010-10-26

    申请号：US12193331

    申请日：2008-08-18

    申请人： Hiroaki Ueno

    发明人： Hiroaki Ueno

    IPC分类号： G11B5/09

    CPC分类号： G11B20/10194

    摘要： According to an aspect of an embodiment, a storage apparatus has a storage for storing a plurality of compensation values in association with a plurality of bit sequence patterns, a head for writing data into a medium and a controller for controlling the apparatus and driving the head, the controller determining whether to use one of the compensation values to drive the head to write an instantaneous data bit in dependence upon the immediate preceding data bits in reference to the bit sequence patterns.

    摘要翻译： 根据实施例的一个方面，一种存储装置具有用于存储与多个位序列模式相关联的多个补偿值的存储器，用于将数据写入介质的头部和用于控制该装置并驱动头部的控制器 参照比特序列模式，控制器确定是否使用补偿值中的一个驱动头来依赖于紧接在前的数据比特来写入瞬时数据比特。