公开(公告)号：US09977699B2

公开(公告)日：2018-05-22

申请号：US14936686

申请日：2015-11-10

Applicant: MediaTek Inc.

Inventor： Jia-Ming Chen ,  Hung-Lin Chou ,  Ya-Ting Chang ,  Shih-Yen Chiu ,  Chia-Hao Hsu ,  Yu-Ming Lin ,  Wan-Ching Huang ,  Jen-Chieh Yang ,  Pi-Cheng Hsiao

IPC: G06F9/46 ,  G06F9/50 ,  G06F1/32

CPC classification number: G06F9/5094 ,  G06F1/3206 ,  G06F1/3287 ,  G06F1/329 ,  G06F2209/505 ,  Y02D10/171 ,  Y02D10/22 ,  Y02D10/24

Abstract: A multi-cluster system having processor cores of different energy efficiency characteristics is configured to operate with high efficiency such that performance and power requirements can be satisfied. The system includes multiple processor cores in a hierarchy of groups. The hierarchy of groups includes: multiple level-1 groups, each level-1 group including one or more of processor cores having identical energy efficiency characteristics, and each level-1 group configured to be assigned tasks by a level-1 scheduler; one or more level-2 groups, each level-2 group including respective level-1 groups, the processor cores in different level-1 groups of the same level-2 group having different energy efficiency characteristics, and each level-2 group configured to be assigned tasks by a respective level-2 scheduler; and a level-3 group including the one or more level-2 groups and configured to be assigned tasks by a level-3 scheduler.

公开(公告)号：US20170322616A1

公开(公告)日：2017-11-09

申请号：US15148031

申请日：2016-05-06

Applicant: MEDIATEK INC.

Inventor： Kuo-Su Hsiao ,  Yen-Lin Lee ,  Shih-Yen Chiu ,  Jia-Ming Chen ,  Mark Shane Peng ,  Ya-Ting Chang

IPC: G06F1/32

CPC classification number: G06F1/3287 ,  G06F1/206 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3243 ,  G06F1/329 ,  G06F1/3293 ,  G06F1/3296 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/152 ,  Y02D10/16 ,  Y02D10/171 ,  Y02D10/172 ,  Y02D10/24

Abstract: Methods and apparatus are provided for adaptive optimization of low-power strategies. In one novel aspect, the device monitors one or more thermal-performance parameters and determines a plurality of operation scenarios for a plurality of corresponding low-power policies. Based on corresponding operation scenarios, the device selects corresponding low-power policy. The device applies different low-power strategy for temperature control based on low-power policies. Different low-power policy is applied to different low-power techniques, such as the DVFS, the CPU hot-plug, and the task migration. In another novel aspect, the device obtains one or more user-defined policy for each corresponding low-power technique. The selection of each low-power policy is further based on its corresponding user-defined policy. In one embodiment, the user-defined DVFS policy includes power policy, performance policy, and DVFS-balanced policy. The user-defined CPU hot-plug policy includes conservative policy, aggressive policy, and hot-plug-balanced policy. The user-defined task-migration policy includes performance policy, and task-migration-balanced policy.

公开(公告)号：US20170160782A1

公开(公告)日：2017-06-08

申请号：US15236247

申请日：2016-08-12

Applicant: MediaTek Inc.

Inventor： Ya-Ting Chang ,  Jia-Ming Chen ,  Nicholas Ching Hui Tang ,  Pi-Cheng Hsiao

IPC: G06F1/32

CPC classification number: G06F1/3203 ,  G06F1/3206 ,  G06F1/325 ,  G06F1/3287 ,  G06F1/329 ,  Y02D10/171

Abstract: A multicore processor system utilizes a power manager for improving power consumption. The system includes multiple processing units and multiple power sources. Each power source is connected to two or more processing units. A condition for activating a processing unit is detected. In response to the detected condition, the power manager identifies a power source that is connected to inactive processing units only. The power manager then activates a target processing unit among the inactive processing units connected to the identified power source.

公开(公告)号：US20150324234A1

公开(公告)日：2015-11-12

申请号：US14650862

申请日：2014-11-14

Applicant: MEDIATEK INC.

Inventor： Ya-Ting Chang ,  Jia-Ming Chen ,  Yu-Ming Lin ,  Tzu-Jen Lo ,  Tung-Feng Yang ,  Yin Chen ,  Hung-Lin Chou

IPC: G06F9/50

CPC classification number: G06F9/5016 ,  G06F9/5033

Abstract: A task scheduling method for a multi-core processor system includes at least the following steps: when a first task belongs to a thread group currently in the multi-core processor system, where the thread group has a plurality of tasks sharing same specific data and/or accessing same specific memory address(es), and the tasks comprise the first task and at least one second task, determining a target processor core in the multi-core processor system based at least partly on distribution of the at least one second task in at least one run queue of at least one processor core in the multi-core processor system, and dispatching the first task to a run queue of the target processor core.

Abstract translation: 用于多核处理器系统的任务调度方法至少包括以下步骤：当第一任务属于当前在多核处理器系统中的线程组时，线程组具有共享相同特定数据的多个任务， /或访问相同的特定存储器地址，并且任务包括第一任务和至少一个第二任务，至少部分地基于至少一个第二任务的分布来确定多核处理器系统中的目标处理器核心 在所述多核处理器系统中的至少一个处理器核心的至少一个运行队列中，并且将所述第一任务分派到所述目标处理器核心的运行队列。

公开(公告)号：US20240095177A1

公开(公告)日：2024-03-21

申请号：US18451775

申请日：2023-08-17

Applicant: MediaTek Inc.

Inventor： Yu-Pin Chen ,  Jia-Ming Chen ,  Chien-Yuan Lai ,  Ya Ting Chang ,  Cheng-Tse Chen

IPC: G06F12/0891

CPC classification number: G06F12/0891

Abstract: A computing system performs partial cache deactivation. The computing system estimates the leakage power of a cache based on operating conditions of the cache including voltage and temperature. The computing system further identifies a region of the cache as a candidate for deactivation based on cache hit counts. The computing system then adjusts the size of the region for the deactivation based on the leakage power and a bandwidth of a memory hierarchy device. The memory hierarchy device is at the next level to the cache in a memory hierarchy of the computing system.

公开(公告)号：US11138037B2

公开(公告)日：2021-10-05

申请号：US16168407

申请日：2018-10-23

Applicant: MediaTek Inc.

Inventor： Ya-Ting Chang ,  Chien-Hao Chiang ,  Ting-Chang Huang ,  Jing-Ting Wu ,  Jia-Ming Chen

IPC: G06F9/48 ,  G06F1/329 ,  G06F9/50 ,  G06F15/16

Abstract: A multi-processor system includes multiple processors arranged in multiple clusters. Different clusters have different power and performance characteristics. The system includes a task scheduler to schedule tasks to the processors. The task scheduler, in response to detection of a scheduling event trigger, is operative to identify a scheduling objective between a first objective of energy optimization and a second objective of load balance. The scheduling objective is identified based on at least respective operating frequencies and loading of all processors in a highest-capacity cluster of the multiple clusters. According to the identified scheduling objective, the task scheduler schedules a given task to a processor selected among the processors in the multiple clusters.

公开(公告)号：US20190129752A1

公开(公告)日：2019-05-02

申请号：US16168407

申请日：2018-10-23

Applicant: MediaTek Inc.

Inventor： Ya-Ting Chang ,  Chien-Hao Chiang ,  Ting-Chang Huang ,  Jing-Ting Wu ,  Jia-Ming Chen

IPC: G06F9/48 ,  G06F15/16 ,  G06F9/50 ,  G06F1/32

Abstract: A multi-processor system includes multiple processors arranged in multiple clusters. Different clusters have different power and performance characteristics. The system includes a task scheduler to schedule tasks to the processors. The task scheduler, in response to detection of a scheduling event trigger, is operative to identify a scheduling objective between a first objective of energy optimization and a second objective of load balance. The scheduling objective is identified based on at least respective operating frequencies and loading of all processors in a highest-capacity cluster of the multiple clusters. According to the identified scheduling objective, the task scheduler schedules a given task to a processor selected among the processors in the multiple clusters.

公开(公告)号：US20160350156A1

公开(公告)日：2016-12-01

申请号：US14967387

申请日：2015-12-14

Applicant: MEDIATEK INC.

Inventor： Tzu-Jen Lo ,  Yu-Ming Lin ,  Jia-Ming Chen ,  Ya-Ting Chang ,  Nicholas Ching Hui Tang ,  Yin Chen ,  Hung-Lin Chou

IPC: G06F9/50

CPC classification number: G06F9/505 ,  G06F9/46

Abstract: A method for performing processor resource allocation in an electronic device is provided, where the method may include the steps of: obtaining task-related information to determine whether a task of a plurality of tasks is a heavy task (e.g. the heavy task may correspond to heavier loading than others of the plurality of tasks), to selectively utilize a specific processor core within a plurality of processor cores to perform the task, and determining whether at least one scenario task exists within others of the plurality of tasks, to selectively determine according to application requirements a minimum processor core count and a minimum operating frequency for performing the at least one scenario task; and performing processor resource allocation according to a power table and system loading, to perform any remaining portion of the plurality of tasks. An apparatus for performing processor resource allocation according to the above method is provided.

Abstract translation: 提供了一种用于在电子设备中执行处理器资源分配的方法，其中该方法可以包括以下步骤：获得任务相关信息以确定多个任务的任务是否是重任务（例如重任务可能对应于 选择性地利用多个处理器核心内的特定处理器核心来执行任务，以及确定在所述多个任务的其他任务内是否存在至少一个场景任务，以选择性地确定 对应用需求的最小处理器核心数和用于执行所述至少一个场景任务的最小操作频率; 以及根据功率表和系统加载来执行处理器资源分配，以执行所述多个任务的任何剩余部分。 提供了一种根据上述方法执行处理器资源分配的装置。

公开(公告)号：US20160179747A1

公开(公告)日：2016-06-23

申请号：US14890427

申请日：2015-04-24

Applicant: MEDIATEK INC.

Inventor： Chun-Hang Wei ,  Hung-Lin Chou ,  Nicholas Ching Hui Tang ,  Jia-Ming Chen ,  Ya-Ting Chang ,  Fan-Lei Liao

IPC: G06F15/82 ,  G06F9/30

CPC classification number: G06F15/82 ,  G06F9/30098 ,  G06F9/5055 ,  G06F9/5066

Abstract: A CPU control method for controlling a first CPU and a second CPU The method comprises: (a) applying the first CPU to execute a first group of codes comprising at least one code if the first CPU is operating to perform a first function; and (c) applying the second CPU to execute a second group of codes comprising at least one code if the second CPU is operating to perform the first function. The first group of codes is optimized for the first CPU, the second group of codes is optimized for the second CPU and the first group of codes comprises at least one code different from the code for the second group of codes.

Abstract translation: 一种用于控制第一CPU和第二CPU的CPU控制方法该方法包括：（a）如果第一CPU正在操作以执行第一功能，则应用第一CPU执行包括至少一个代码的第一组代码; 以及（c）如果所述第二CPU正在操作以执行所述第一功能，则应用所述第二CPU执行包括至少一个代码的第二组代码。 第一组代码针对第一个CPU进行了优化，第二组代码针对第二个CPU进行了优化，第一组代码包括与第二组代码不同的代码中的至少一个代码。

公开(公告)号：US20150121387A1

公开(公告)日：2015-04-30

申请号：US14480646

申请日：2014-09-09

Applicant: MEDIATEK INC.

Inventor： Ya-Ting Chang ,  Jia-Ming Chen ,  Yu-Ming Lin ,  Yin Chen ,  Hung-Lin Chou ,  Yeh-Ji Chou ,  Shou-Wen Ho

IPC: G06F9/48

CPC classification number: G06F9/4881 ,  G06F2209/483 ,  G06F2209/501

Abstract: A task scheduling method is applied to a heterogeneous multi-core system. The heterogeneous multi-core system has at least one first processor core and at least one second processor core. The task scheduling method includes: referring to task priorities of tasks of the heterogeneous processor cores to identify at least one first task of the tasks that belongs to a first priority task group, wherein each first task belonging to the first priority task group has a task priority not lower than task priorities of other tasks not belonging to the first priority task group; and dispatching at least one of the at least one first task to at least one run queue of at least one of the at least one first processor core.

Abstract translation: 任务调度方法应用于异构多​​核系统。 异构多核系统具有至少一个第一处理器核和至少一个第二处理器核。 任务调度方法包括：参考异构处理器核的任务的任务优先级，以识别属于第一优先级任务组的任务的至少一个第一任务，其中属于第一优先级任务组的每个第一任务具有任务 优先级不低于不属于第一优先级任务组的其他任务的任务优先级; 以及将所述至少一个第一任务中的至少一个调度到所述至少一个第一处理器核心中的至少一个的至少一个运行队列。