公开(公告)号：US20180331120A1

公开(公告)日：2018-11-15

申请号：US16041388

申请日：2018-07-20

Applicant: Micron Technology, Inc.

Inventor： Fei Wang ,  Tom J. John ,  Kunal Shrotri ,  Anish A. Khandekar ,  Aaron R. Wilson ,  John D. Hopkins ,  Derek F. Lundberg

IPC: H01L27/11582 ,  H01L21/033 ,  H01L29/788 ,  H01L21/311 ,  H01L27/11556

CPC classification number: H01L27/11582 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/31116 ,  H01L21/31144 ,  H01L27/11556 ,  H01L29/7883

Abstract: A method comprises forming material to be etched over a substrate. An etch mask comprising a silicon nitride-comprising region is formed elevationally over the material. The etch mask comprises an elevationally-extending mask opening in the silicon nitride-comprising region that has a minimum horizontal open dimension that is greater in an elevationally-innermost portion of the region than in an elevationally-outermost portion of the region. The elevationally-outermost portion has a greater etch rate in at least one of HF and H3PO4 than does the elevationally-innermost portion. The etch mask is used as a mask while etching an elevationally-extending mask opening into the material. The silicon nitride-comprising region is exposed to at least one of HF and H3PO4 to increase the minimum horizontal open dimension in the elevationally-outermost portion to a greater degree than increase, if any, in the minimum horizontal open dimension in the elevationally-innermost portion. Other aspects and embodiments, including structure independent of method of manufacture, are disclosed.

公开(公告)号：US09893083B1

公开(公告)日：2018-02-13

申请号：US15293133

申请日：2016-10-13

Applicant: Micron Technology, Inc.

Inventor： Fei Wang ,  Tom J. John ,  Kunal Shrotri ,  Anish A. Khandekar ,  Aaron R. Wilson ,  John D. Hopkins ,  Derek F. Lundberg

IPC: H01L27/06 ,  H01L21/311 ,  H01L27/11582 ,  H01L27/11556 ,  H01L21/033 ,  H01L29/788

CPC classification number: H01L27/11582 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/31116 ,  H01L21/31144 ,  H01L27/11556 ,  H01L29/7883

Abstract: A method comprises forming material to be etched over a substrate. An etch mask comprising a silicon nitride-comprising region is formed elevationally over the material. The etch mask comprises an elevationally-extending mask opening in the silicon nitride-comprising region that has a minimum horizontal open dimension that is greater in an elevationally-innermost portion of the region than in an elevationally-outermost portion of the region. The elevationally-outermost portion has a greater etch rate in at least one of HF and H3PO4 than does the elevationally-innermost portion. The etch mask is used as a mask while etching an elevationally-extending mask opening into the material. The silicon nitride-comprising region is exposed to at least one of HF and H3PO4 to increase the minimum horizontal open dimension in the elevationally-outermost portion to a greater degree than increase, if any, in the minimum horizontal open dimension in the elevationally-innermost portion. Other aspects and embodiments, including structure independent of method of manufacture, are disclosed.

公开(公告)号：US08946076B2

公开(公告)日：2015-02-03

申请号：US13835551

申请日：2013-03-15

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege ,  Aaron R. Wilson

IPC: H01L21/302 ,  H01L27/115 ,  H01L21/308 ,  H01L21/3065 ,  H01L21/033

CPC classification number: H01L27/11578 ,  H01L21/0334 ,  H01L21/0335 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/31144 ,  H01L27/11556 ,  H01L29/66825 ,  H01L29/7889

Abstract: Some embodiments include methods of forming vertically-stacked memory cells. An opening is formed to extend partially through a stack of alternating electrically insulative levels and electrically conductive levels. A liner is formed along sidewalls of the opening, and then the stack is etched to extend the opening. The liner is at least partially consumed during the etch and forms passivation material. Three zones occur during the etch, with one of the zones being an upper zone of the opening protected by the liner, another of the zones being an intermediate zone of the opening protected by passivation material but not the liner, and another of the zones being a lower zone of the opening which is not protected by either passivation material or the liner. Cavities are formed to extend into the electrically conductive levels along sidewalls of the opening. Charge blocking dielectric and charge-storage structures are formed within the cavities.

Abstract translation: 一些实施例包括形成垂直堆叠的存储器单元的方法。 形成开口部分地延伸通过交替的电绝缘水平和导电水平的堆叠。 沿着开口的侧壁形成衬垫，然后蚀刻叠层以延伸开口。 在蚀刻期间衬垫至少部分消耗，并形成钝化材料。 在蚀刻期间发生三个区域，其中一个区域是由衬垫保护的开口的上部区域，另一个区域是由钝化材料而不是衬垫保护的开口的中间区域，另一个区域是 开口的下部区域不被钝化材料或衬垫保护。 腔体形成为延伸到沿开口侧壁的导电水平。 电荷阻挡电介质和电荷存储结构形成在空腔内。