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    Detecting page fault traffic
    22.
    发明授权
    Detecting page fault traffic 有权

    公开(公告)号：US11663062B2

    公开(公告)日：2023-05-30

    申请号：US17668210

    申请日：2022-02-09

    Applicant: Micron Technology, Inc.

    Inventor： Luca Porzio ,  Alessandro Orlando ,  Danilo Caraccio ,  Roberto Izzi

    IPC: G06F11/30 ,  G06F11/07

    CPC classification number: G06F11/073 ,  G06F11/076 ,  G06F11/0772 ,  G06F11/0781 ,  G06F11/3037

    Abstract: Methods, systems, and devices for detecting page fault traffic are described. A memory device may execute a self-learning algorithm to determine a priority size for read requests, such as a maximum readahead window size or other size related to page faults in a memory system. The memory device may determine the priority size based at least in part on by tracking how many read requests are received for different sizes of sets of data. Once the priority size is determined, the memory device may detect subsequent read requests for sets of data having the priority size, and the memory device may prioritize or other optimize the execution of such read requests.

    USAGE LEVEL IDENTIFICATION FOR MEMORY DEVICE ADDRESSES
    23.
    发明申请
    USAGE LEVEL IDENTIFICATION FOR MEMORY DEVICE ADDRESSES 有权

    公开(公告)号：US20220342808A1

    公开(公告)日：2022-10-27

    申请号：US17241877

    申请日：2021-04-27

    Applicant: Micron Technology, Inc.

    Inventor： Luca Porzio ,  Roberto Izzi ,  Giuseppe Cariello

    IPC: G06F12/02 ,  G06F12/126 ,  G06F13/16

    Abstract: Methods, systems, and devices for usage level identification for memory device addresses are described. Systems, techniques, and devices are described herein in which a memory device may determine where to store data according to a level of usage of the data. The memory device may receive a write command indicating data to be written, a type of the data, and a logical address of a memory array for writing the data. The memory device may identify an entry associated with the logical address in a table that maps the logical address to a physical address of the memory array. The entry may include a field configured to maintain a level of usage for the logical address. The memory device may update the level of usage value according to a process and write the data to a physical address of the memory array based on the level of usage value.

    DETERMINING AVAILABLE RESOURCES FOR STORING DATA
    27.
    发明公开
    DETERMINING AVAILABLE RESOURCES FOR STORING DATA 审中-公开

    公开(公告)号：US20240345766A1

    公开(公告)日：2024-10-17

    申请号：US18644759

    申请日：2024-04-24

    Applicant: Micron Technology, Inc.

    Inventor： Roberto Izzi ,  Reshmi Basu ,  Luca Porzio ,  Christian M. Gyllenskog

    IPC: G06F3/06 ,  G06F12/02

    CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679 ,  G06F12/0253 ,  G06F2212/7205

    Abstract: Methods, systems, and devices for memory operations are described. A host system may obtain data for writing to a memory system. The host system may send, to the memory system, an indication that the data is to be written to the memory system, and the memory system may remove invalid data at the memory system until the memory system has sufficient resources to store the data. Based on the memory system having sufficient resources, the memory system may delay background operations at the memory system until the data has been written to the memory system. The memory system may also create a restore point based on the memory system having sufficient resources and receiving the data. In other examples, the removal of invalid data at the memory system may be delayed until after the data is written to the memory system.

    Determining available resources for storing data
    29.
    发明授权
    Determining available resources for storing data 有权

    公开(公告)号：US11989439B2

    公开(公告)日：2024-05-21

    申请号：US17488205

    申请日：2021-09-28

    Applicant: Micron Technology, Inc.

    Inventor： Roberto Izzi ,  Reshmi Basu ,  Luca Porzio ,  Christian M. Gyllenskog

    IPC: G06F3/06 ,  G06F12/02

    CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679 ,  G06F12/0253 ,  G06F2212/7205

    Abstract: Methods, systems, and devices for memory operations are described. A host system may obtain data for writing to a memory system. The host system may send, to the memory system, an indication that the data is to be written to the memory system, and the memory system may remove invalid data at the memory system until the memory system has sufficient resources to store the data. Based on the memory system having sufficient resources, the memory system may delay background operations at the memory system until the data has been written to the memory system. The memory system may also create a restore point based on the memory system having sufficient resources and receiving the data. In other examples, the removal of invalid data at the memory system may be delayed until after the data is written to the memory system.

    MEMORY DEVICES INCLUDING IDLE TIME PREDICTION
    30.
    发明公开
    MEMORY DEVICES INCLUDING IDLE TIME PREDICTION 审中-公开

    公开(公告)号：US20240069809A1

    公开(公告)日：2024-02-29

    申请号：US17949333

    申请日：2022-09-21

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Tyler L. Betz ,  Sundararajan N. Sankaranarayanan ,  Roberto Izzi ,  Massimo Zucchinali ,  Xiangyu Tang

    IPC: G06F3/06

    CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0634 ,  G06F3/0679

    Abstract: A memory device includes an interface to communicate with a host, an array of memory cells, and a controller. The controller is configured to access the array of memory cells in response to commands from the host. The controller is further configured to enter an idle time in response to no commands from the host with queue empty, receive a first command from the host, and exit the idle time in response receiving a second command from the host. The controller is further configured to for a plurality of idle times, generate a history indicating a length of each idle time. The controller is further configured to predict the length of a subsequent idle time based on the history.

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