公开(公告)号：US5270308A

公开(公告)日：1993-12-14

申请号：US764692

申请日：1991-09-25

申请人： Mitsuru Shiraishi ,  Shohei Hashiguchi ,  Toshifumi Watanabe

发明人： Mitsuru Shiraishi ,  Shohei Hashiguchi ,  Toshifumi Watanabe

IPC分类号： C07D265/16 ,  C07D413/04 ,  C07D417/04 ,  C07F7/08 ,  A61K31/535 ,  C07D265/12 ,  C07D498/04

CPC分类号： C07D413/04 ,  C07D265/16 ,  C07D417/04 ,  C07F7/0812

摘要： A new compound of the formula: ##STR1## wherein ##STR2## is an optionally substituted benzene ring; R.sup.1 is a carbocyclic or heterocyclic group which is linked to the 4-position of the 1,3-benzoxazine ring through a carbon-carbon bond, a hydrocarbon residue, etc.; and R.sup.2 and R.sup.3 are independently a hydrogen atom or an optionally substituted C.sub.1-6 alkyl group, etc., or a salt thereof is useful for treating and preventing heart, circulatory, respiratory and cerebral diseases.

公开(公告)号：US20120106254A1

公开(公告)日：2012-05-03

申请号：US13235390

申请日：2011-09-18

申请人： Yuuta SANO ,  Toshifumi Watanabe

发明人： Yuuta SANO ,  Toshifumi Watanabe

IPC分类号： G11C16/06

CPC分类号： G11C16/08 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/32

摘要： According to one embodiment, a memory system includes a NAND flash memory, a first unit, and an second unit. Memory cells capable of holding data and management data as a first control signal. Memory cells are arranged in a matrix in the NAND flash memory. The first unit holds a second and a third signal. The second signal is made variable in accordance with an output frequency. The third signal is made variable. The second unit outputs the data to an outside in accordance with the first to third signals. The second unit includes a buffer unit including first to third transistors. The output frequency includes a first frequency and a second frequency. If the first to third transistors output the data to the outside in synchronization with the second frequency, the first to third transistors may be turned on regardless of a value of the first control signal.

摘要翻译： 根据一个实施例，存储器系统包括NAND快闪存储器，第一单元和第二单元。 能够将数据和管理数据保存为第一控制信号的存储单元。 存储器单元被布置在NAND闪存中的矩阵中。 第一单元保持第二和第三信号。 第二信号根据输出频率变化。 第三个信号是可变的。 第二单元根据第一至第三信号将数据输出到外部。 第二单元包括包括第一至第三晶体管的缓冲单元。 输出频率包括第一频率和第二频率。 如果第一至第三晶体管与第二频率同步地将数据输出到外部，则不管第一控制信号的值如何，第一至第三晶体管可以导通。

公开(公告)号：US20060173059A1

公开(公告)日：2006-08-03

申请号：US11391208

申请日：2006-03-29

申请人： Toshifumi Watanabe ,  Keiji Kusumoto ,  Mami Ojima

发明人： Toshifumi Watanabe ,  Keiji Kusumoto ,  Mami Ojima

IPC分类号： C07D403/02 ,  A61K31/4184

CPC分类号： C07D403/10 ,  A61K9/1647 ,  A61K9/2054 ,  A61K9/2059 ,  A61K9/4858 ,  A61K9/4866 ,  A61K31/4164 ,  A61K31/4178 ,  A61K31/4184 ,  A61K31/4245 ,  A61K31/433

摘要： An agent for preventing or treating portal hypertension comprising a compound represented by the general formula (I): wherein R1 represents a group capable of forming an anion, etc.; X represents a bond or a spacer; n is an integer of 1 or 2; ring A is benzene ring which may be further substituted; R2 represents a group capable of forming an anion, etc.; and R3 represents a hydrocarbon group which may bonded via a hetero atom, and may be substituted, a salt thereof or a prodrug thereof, is provided. This agent has sufficiently excellent properties as medicine, since it has excellent prophylactic and therapeutic effects on portal hypertension without any side effect, etc.

摘要翻译： 一种用于预防或治疗门静脉高压的药剂，其包含由通式（I）表示的化合物：其中R 1表示能够形成阴离子的基团等; X表示键或间隔基; n为1或2的整数; 环A是可以被进一步取代的苯环; R 2表示能够形成阴离子的基团等; 并且R 3表示可以通过杂原子键合并可以被取代的烃基，其盐或其前药。 该药剂作为药物具有充分优异的特性，因为它对门静脉高压没有任何副作用等具有优异的预防和治疗效果。

公开(公告)号：US06911678B2

公开(公告)日：2005-06-28

申请号：US10658973

申请日：2003-09-10

申请人： Shigeo Fujisawa ,  Iwao Shoji ,  Toshifumi Watanabe

发明人： Shigeo Fujisawa ,  Iwao Shoji ,  Toshifumi Watanabe

IPC分类号： H01L23/48 ,  H01L33/54 ,  H01L33/56 ,  H01L33/00

CPC分类号： H01L33/62 ,  H01L33/54 ,  H01L33/56 ,  H01L2924/0002 ,  H01L2924/00

摘要： A surface-mountable glass-sealed light-emitting diode is provided. It has high reliability and high external quantum efficiency, and can achieve a low-cost components-implemented board. An LED bare chip (1) has opposite surfaces, which are provided with electrodes (2) for supplying power from external. A pair of dumet wires (3) are separately connected to the respective electrodes (2) sandwiching the LED bare chip (1) therebetween. The LED bare chip (1), the electrodes (2) and parts of the dumet wires (3) are integrally glass-sealed (4). A pair of metallic disc plates (6) have holes (5) formed through the center. They are secured on both sides of the glass seal (4) and solder-plated, allowing the pair of dumet wires (3) projected from the glass seal to pass through the holes (5).

摘要翻译： 提供了可表面安装的玻璃密封发光二极管。 它具有高可靠性和高外部量子效率，可实现低成本组件实现的电路板。 LED裸芯片（1）具有相对的表面，其具有用于从外部供电的电极（2）。 一对阴极导线（3）分别连接到夹在其间的LED裸芯片（1）的各个电极（2）。 LED裸芯片（1），电极（2）和防漏线（3）的一部分被一体玻璃密封（4）。 一对金属盘片（6）具有通过中心形成的孔（5）。 它们被固定在玻璃密封件（4）的两侧并且被焊接，允许从玻璃密封件突出的一对防辐射线（3）穿过孔（5）。

公开(公告)号：US6140325A

公开(公告)日：2000-10-31

申请号：US723151

申请日：1996-09-30

申请人： Shuichi Furuya ,  Nobuo Choh ,  Tetsuya Ohtaki ,  Toshifumi Watanabe

发明人： Shuichi Furuya ,  Nobuo Choh ,  Tetsuya Ohtaki ,  Toshifumi Watanabe

IPC分类号： C07D495/04 ,  A61K31/519 ,  C07D519/00

CPC分类号： C07D495/04

摘要： Thienopyrimidine derivatives are disclosed. Also disclosed are methods for the production and use of these compounds.

摘要翻译： 披露噻吩并嘧啶衍生物。 还公开了用于生产和使用这些化合物的方法。

公开(公告)号：US5753619A

公开(公告)日：1998-05-19

申请号：US564442

申请日：1995-11-29

申请人： Toshifumi Watanabe ,  Keiji Kusumoto ,  Mitsuhiro Wakimasu

发明人： Toshifumi Watanabe ,  Keiji Kusumoto ,  Mitsuhiro Wakimasu

IPC分类号： A61K38/00 ,  C07K7/64 ,  C07K14/575

CPC分类号： C07K14/57536 ,  C07K7/64 ,  A61K38/00

摘要： Cyclic hexapeptides having antagonistic activity on endothelin receptors of the formula �I!: ##STR1## wherein X and Y each is an .alpha.-amino acid residue having D-, L-form or DL-form, A is a D-acidic-.alpha.-amino acid residue, B is a neutral-.alpha.-amino acid residue having D- or L-form, C is an L-.alpha.-amino acid residue and E is a D-.alpha.-amino acid residue having an aromatic ring group can be effectively used for prophylaxis and/or treatment of pulmonary circulatory diseases.

摘要翻译： 对式[I]的内皮素受体具有拮抗作用的环状六肽：其中X和Y各自为具有D-，L-型或DL-型的α-氨基酸残基，A为D- 酸性-α-氨基酸残基，B是具有D-或L-形式的中性-α-氨基酸残基，C是L-氨基酸残基，E是具有芳香族的D-氨基酸残基 环组可有效用于预防和/或治疗肺循环系统疾病。

公开(公告)号：US5708918A

公开(公告)日：1998-01-13

申请号：US727319

申请日：1996-10-08

申请人： Yukihiko Okuno ,  Masaki Tanaka ,  Naoyoshi Kinoshita ,  Atsushi Kawai ,  Toshifumi Watanabe

发明人： Yukihiko Okuno ,  Masaki Tanaka ,  Naoyoshi Kinoshita ,  Atsushi Kawai ,  Toshifumi Watanabe

IPC分类号： G03G15/00 ,  G03G15/01 ,  G03G15/08 ,  G03G15/10

CPC分类号： G03G15/5041 ,  G03G15/01 ,  G03G15/0855 ,  G03G2215/00042 ,  G03G2215/00063

摘要： An image formation apparatus for forming a full color image in the four colors of cyan, magenta, yellow and black has a optical ATDC sensor attached in a cyan developing device to control the toner density under optical ATDC. A black developing device has the toner density controlled by AIDC. A standard develop efficiency .eta.STD of the cyan developing device obtained as a result of the AIDC is compared with a develop efficiency .eta. of black toner. The toner supply amount of the black developing device is determined according to the comparison result to supply the toner. Thus, an image formation apparatus is provided that can detect at favorable accuracy the toner density of a developing device incorporating a developer of which the toner density cannot be detected using optical ATDC to supply a required amount of toner.

摘要翻译： 用于形成青色，品红色，黄色和黑色四种颜色的全色图像的图像形成装置具有安装在青色显影装置中的光学ATDC传感器，以控制光学ATDC下的调色剂密度。 黑色显影装置具有由AIDC控制的调色剂浓度。 将由AIDC获得的青色显影装置的标准开发效率等级STD与黑色调色剂的显影效率η进行比较。 根据比较结果确定黑色显影装置的调色剂供应量以供应调色剂。 因此，提供了能够以良好的精确度检测包含使用光学ATDC不能检测调色剂浓度的显影剂的显影装置的调色剂浓度来提供所需量的调色剂的图像形成装置。

公开(公告)号：US08649234B2

公开(公告)日：2014-02-11

申请号：US13285181

申请日：2011-10-31

申请人： Toshifumi Watanabe ,  Hidetoshi Saito

发明人： Toshifumi Watanabe ,  Hidetoshi Saito

IPC分类号： G11C7/00

CPC分类号： G11C7/222 ,  G11C16/10 ,  G11C16/32

摘要： According to one embodiment, an interface includes first to third input circuits, delay and selection circuits. The first input circuit outputs an active first internal signal in response to an active first control signal received by a memory device. The second input circuit outputs an active second internal signal in response to an active second control signal received by the device while the device is receiving the active first control signal. The delay circuit outputs a selection signal in first or second states after the elapse of a first period from inactivation or activation of the first control signal. The selection circuit outputs the first and second internal signals as an enable signal while receiving the selection signal of the first and second states. The third input circuit outputs an input signal received from the outside from the interface to inside the device while receiving the active enable signal.

摘要翻译： 根据一个实施例，接口包括第一至第三输入电路，延迟和选择电路。 第一输入电路响应于由存储器件接收到的有效的第一控制信号而输出有效的第一内部信号。 第二输入电路响应于设备在接收到有效的第一控制信号时接收到的有效的第二控制信号而输出有效的第二内部信号。 延迟电路在从第一控制信号的失活或激活开始经过第一周期之后，输出第一或第二状态的选择信号。 选择电路在接收第一和第二状态的选择信号的同时，将第一和第二内部信号作为使能信号输出。 第三输入电路在接收到有效使能信号的同时，将从外部接收的输入信号输出到设备内部。

公开(公告)号：US20120134211A1

公开(公告)日：2012-05-31

申请号：US13306636

申请日：2011-11-29

申请人： Jin KASHIWAGI ,  Shirou Fujita ,  Toshifumi Watanabe

发明人： Jin KASHIWAGI ,  Shirou Fujita ,  Toshifumi Watanabe

IPC分类号： G11C16/26

CPC分类号： G11C16/0483 ,  G11C16/26

摘要： A memory system includes: a plurality of banks each including a memory cell array and a sense amplifier; a buffer circuit electrically connected to the plurality of banks; a switch circuit configured to switch on and off an electrical connection between the buffer circuit and each of the plurality of banks an interface electrically connected to the buffer circuit; and a controller configured to control the plurality of banks, the buffer circuit, the switch circuit and the interface, wherein for reading data held in the memory cell array by outputting the data to the interface in 5 clock cycles, the controller is configured to control the switch circuit in order that the switch circuit electrically connects a selected one of the banks to the buffer circuit upon the lapse of 1.5 clock cycles after a clock is inputted into the selected bank.

摘要翻译： 存储器系统包括：多个存储体，每个存储体包括存储单元阵列和读出放大器; 电连接到所述多个堤的缓冲电路; 开关电路，被配置为接通和断开所述缓冲电路和所述多个组中的每一个的电连接，所述接口电连接到所述缓冲电路; 以及控制器，被配置为控制所述多个存储体，所述缓冲器电路，所述开关电路和所述接口，其中，为了通过以5个时钟周期将数据输出到所述接口来读取存储在所述存储单元阵列中的数据，所述控制器被配置为控制 开关电路，以便在将时钟输入到所选择的存储体之后，开关电路经过1.5个时钟周期将所选择的存储体之一电路连接到缓冲电路。

公开(公告)号：US06285839B1

公开(公告)日：2001-09-04

申请号：US09251457

申请日：1999-02-17

申请人： Masaki Tanaka ,  Tetsuya Sakai ,  Futoshi Hamada ,  Toshifumi Watanabe

发明人： Masaki Tanaka ,  Tetsuya Sakai ,  Futoshi Hamada ,  Toshifumi Watanabe

IPC分类号： G03G1500

CPC分类号： G03G15/5058 ,  G03G15/0194 ,  G03G2215/00042 ,  G03G2215/00059 ,  G03G2215/00063 ,  G03G2215/00067

摘要： A tandem-type image forming apparatus forms a color image by transferring images formed by a plurality of image forming units set along a transfer belt onto a recording sheet transported by the transfer belt. The tandem-type image forming apparatus includes a plurality of detecting units, each detecting a toner image formed by a corresponding image forming unit to obtain the amount of toner in the toner image, a standard pattern formation controlling unit for controlling one of the image forming units to form a standard pattern to be detected by the detecting units, a sensitivity obtaining unit for obtaining a value as an evaluation value that is outputted by each of the detecting units on detecting the standard pattern, and an detection output adjusting unit for adjusting a value outputted by the detecting unit in accordance with the evaluation value. An image forming condition is set for each of the image forming units in accordance with the adjusted value, and image formation is performed under the image forming conditions.

摘要翻译： 串联型图像形成装置通过将由沿着转印带设置的多个图像形成单元形成的图像转印到由转印带传送的记录纸上而形成彩色图像。 串联型图像形成装置包括多个检测单元，每个检测单元检测由相应图像形成单元形成的调色剂图像以获得调色剂图像中的调色剂量;标准图案形成控制单元，用于控制图像形成 单元，以形成由检测单元检测的标准图案;灵敏度获取单元，用于获得作为每个检测单元在检测标准图案时输出的评估值的值;以及检测输出调整单元，用于调整 由检测单元根据评估值输出的值。 根据调整值为每个图像形成单元设置图像形成条件，并且在图像形成条件下执行图像形成。