公开(公告)号：US20240305007A1

公开(公告)日：2024-09-12

申请号：US18596695

申请日：2024-03-06

Applicant: NXP B.V.

Inventor： Olivier Tesson

IPC: H01Q13/20 ,  H01Q21/06

CPC classification number: H01Q13/206 ,  H01Q21/061

Abstract: A passive component comprising a first port and a second port, wherein the first and second ports are provided on a first axis, a third port and a fourth port, wherein the third and fourth ports are provided on a second axis perpendicular to the first axis, and a transmission line arrangement comprising four transmission lines, wherein the first port and the second port are each coupled to both the third port and the fourth port by respective transmission lines of the transmission line arrangement, wherein each transmission line follows a meandering path and each transmission line has the same length, such that the transmission line arrangement is symmetrical about at least one axis of symmetry.

公开(公告)号：US20230170126A1

公开(公告)日：2023-06-01

申请号：US18054217

申请日：2022-11-10

Applicant: NXP B.V.

Inventor： Olivier Tesson ,  Konstantinos Giannakidis

IPC: H01F27/00 ,  H01F29/02

CPC classification number: H01F27/006 ,  H01F29/025

Abstract: A transformer (100, 100′) is disclosed, comprising a first conducting element (110) having a first lobed portion (114) arranged to form a first plurality of lobes (116); and a second conducting element (120) having a second lobed portion (124) arranged to form a second plurality of lobes (126); wherein said first lobed portion (114) overlaps said second lobed portion (124) to define a plurality of enclosed areas (130). The transformer is adapted for applications requiring an autotransformer having a weak, negative magnetic coupling coefficient.

公开(公告)号：US20230083719A1

公开(公告)日：2023-03-16

申请号：US17819794

申请日：2022-08-15

Applicant: NXP B.V.

Inventor： Olivier Tesson

IPC: H03H7/20 ,  H03H17/08 ,  H01Q3/30 ,  H01Q1/52

Abstract: An embodiment of passive phase shifter comprises a ground shield, a pair of ground walls electrically connected to the ground shield having a first height above the ground shield; and a signal line positioned between the ground walls and electrically isolated from the ground shield. The signal line may comprise an intermediate signal line separated a second height above the ground shield; a top signal line separated from the intermediate signal line at a third height above the ground shield and electrically connected to the intermediate signal line by one or more conductive vias; and a plurality of blocks positioned between and electrically isolated from the intermediate signal line and the top signal line.

公开(公告)号：US10403540B2

公开(公告)日：2019-09-03

申请号：US14479561

申请日：2014-09-08

Applicant: NXP B.V.

Inventor： Patrice Gamand ,  Olivier Tesson

IPC: H01L21/76 ,  H01Q1/48 ,  H01L23/552 ,  H01L23/64 ,  H01L23/66 ,  H01Q1/52 ,  H05K1/02 ,  H01L23/00

Abstract: An integrated circuit for a packaged device is proposed. The circuit comprises: a circuit having first and second electromagnetic radiating elements fabricated on a die; a package substrate comprising an upper surface and a lower surface; and a grounding layer provided on the lower surface of the package substrate, the grounding layer being adapted to connect to a grounding plane of a printed circuit board. The die is mounted on the upper surface of the package substrate. The grounding layer comprises a void, at least a portion of the void being positioned so as to at least partially electromagnetically isolate the first electromagnetic radiating element from the second electromagnetic radiating element.

公开(公告)号：US20170373054A1

公开(公告)日：2017-12-28

申请号：US15596188

申请日：2017-05-16

Applicant: NXP B.V.

Inventor： Olivier Tesson ,  Thomas Francois

IPC: H01L27/02 ,  H01L29/06 ,  H01L23/528 ,  H01L29/417 ,  H01L23/522

CPC classification number: H01L27/0292 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/0207 ,  H01L27/0266 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/41725 ,  H01L29/41758

Abstract: A semiconductor switch device and a method of making the same. The semiconductor switch device includes a field effect transistor located on a semiconductor substrate. The field effect transistor includes a plurality of gates. Each gate includes a gate electrode and gate dielectric arranged in a loop on a major surface of the substrate. The loops formed by the gates are arranged concentrically. Each gate has a source region located adjacent an inner edge or outer edge of the loop formed by that gate and a drain region located adjacent the other edge of said inner edge and said outer edge of the loop formed by that gate.

公开(公告)号：US09721844B2

公开(公告)日：2017-08-01

申请号：US15013648

申请日：2016-02-02

Applicant: NXP B.V.

Inventor： Olivier Tesson ,  Hamza Nijjari

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/417 ,  H01L29/66 ,  H01L29/423 ,  H01L21/762 ,  H01L23/482

CPC classification number: H01L21/823475 ,  H01L21/76224 ,  H01L23/4824 ,  H01L29/0696 ,  H01L29/41758 ,  H01L29/4238 ,  H01L29/66477 ,  H01L29/78

Abstract: A semiconductor device comprising a switch and a method of making the same. The device has a layout that includes one or more rectangular unit cells. Each unit cell includes a gate that divides the unit cell into four corner regions. Each unit cell also includes a source comprising first and second source regions located in respective opposite corner regions of the unit cell. Each unit cell further includes a drain comprising first and second drain regions located in respective opposite corner regions of the unit cell. Each unit cell also includes a plurality of connection members extending over the gate, source and drain for providing electrical connections to the gate, source and drain.

公开(公告)号：US20150270061A1

公开(公告)日：2015-09-24

申请号：US14680699

申请日：2015-04-07

Applicant: NXP B.V.

Inventor： Magali Duplessis ,  Olivier Tesson

IPC: H01F41/06 ,  C25D3/38 ,  B23K1/20 ,  C23C14/14 ,  C23C14/02 ,  C25D5/02 ,  B23K1/00

CPC classification number: H01F41/06 ,  B23K1/0016 ,  B23K1/20 ,  C23C14/021 ,  C23C14/14 ,  C25D3/38 ,  C25D5/02 ,  H01F5/00 ,  H01F17/0006 ,  H01F27/2895 ,  H01F27/34 ,  H01F41/041 ,  H01F2017/0086 ,  H01L23/5227 ,  H01L2924/0002 ,  Y10T29/49071 ,  H01L2924/00

Abstract: A transformer comprising primary and secondary windings is disclosed. Each winding has first and second metal capping layers coupled together electrically in parallel by a metal connector passing through a substrate lying between the first and second metal capping layers.

Abstract translation: 公开了一种包括初级和次级绕组的变压器。 每个绕组具有通过穿过位于第一和第二金属封盖层之间的衬底的金属连接器并联电连接的第一和第二金属覆盖层。

公开(公告)号：US20150070240A1

公开(公告)日：2015-03-12

申请号：US14479561

申请日：2014-09-08

Applicant: NXP B.V.

Inventor： Patrice Gamand ,  Olivier Tesson

IPC: H01Q1/52 ,  H01L21/76 ,  H01Q1/48

CPC classification number: H01L21/76 ,  H01L23/552 ,  H01L23/645 ,  H01L23/66 ,  H01L24/16 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01Q1/48 ,  H01Q1/521 ,  H05K1/0225

Abstract: An integrated circuit for a packaged device is proposed. The circuit comprises: a circuit having first and second electromagnetic radiating elements fabricated on a die; a package substrate comprising an upper surface and a lower surface; and a grounding layer provided on the lower surface of the package substrate, the grounding layer being adapted to connect to a grounding plane of a printed circuit board. The die is mounted on the upper surface of the package substrate. The grounding layer comprises a void, at least a portion of the void being positioned so as to at least partially electromagnetically isolate the first electromagnetic radiating element from the second electromagnetic radiating element.

Abstract translation: 提出了一种用于封装器件的集成电路。 该电路包括：具有在模具上制造的第一和第二电磁辐射元件的电路; 封装基板，包括上表面和下表面; 以及设置在所述封装基板的下表面上的接地层，所述接地层适于连接到印刷电路板的接地平面。 模具安装在封装基板的上表面上。 所述接地层包括空隙，所述空隙的至少一部分被定位成至少部分地将所述第一电磁辐射元件与所述第二电磁辐射元件电磁隔离。