摘要:
A control loop having an amplifier arrangement that has a variable gain is specified. The amplifier has an output for outputting a signal representing the present gain. The control loop comprises a combination unit, which combines the signal at the additional output with a threshold value in such a way as to avoid a kink in the characteristic curve in the region of the highest or lowest variable gain. The advantages of an amplifier that is voltage-linear within wide ranges can thus be united with low switching transients.
摘要:
An oscillator is disclosed that is tunable to discrete values, and includes a tuning element which can be connected via a switching device. A rectifier circuit is connected to the output of the oscillator and forms a clock signal from the oscillator signal. The oscillator circuit contains a phase delay circuit having a switching input, a clock signal input which is coupled to the output of the rectifier circuit, and a switching output coupled to the switching device. The phase delay circuit has a comparison circuit for comparison of a phase of the clock signal that is applied to the signal input with a reference phase. This phase delay circuit is designed to emit a switching signal after application of an activation signal to the switching input and after the phase of the clock signal which is applied to the signal input matches the reference phase. In consequence, the switching process is delayed until the step-function response of the output signal of the oscillator does not cause a sudden phase change in the clock signal.
摘要:
A digitally controlled oscillator circuit for generating a signal at variable frequency is provided. The circuit has a data input for a digital control word and a capacitive circuit for varying the variable frequency of the signal. The capacitive circuit comprises a control input for a control signal and its total capacitance varies on the basis of the control signal. The data input and the control input have a mapping device coupled between them. This device is set up such that it ascertains the control signal from the digital control word.
摘要:
A control loop having an amplifier arrangement that has a variable gain is specified. The amplifier has an output for outputting a signal representing the present gain. The control loop comprises a combination unit, which combines the signal at the additional output with a threshold value in such a way as to avoid a kink in the characteristic curve in the region of the highest or lowest variable gain. The advantages of an amplifier that is voltage-linear within wide ranges can thus be united with low switching transients.
摘要:
A signal generator for a transmitter or a receiver for transmitting or receiving RF-signals according to a given communication protocol includes an oscillator and a mismatch compensator. The oscillator is configured to provide a signal generator output signal having a signal generator output frequency and comprises a fine tuning circuit for providing a fine adjustment of the signal generator output frequency based on a fine tuning signal and a coarse tuning circuit for providing a course adjustment of the signal generator output frequency based on a coarse tuning signal. The mismatch compensator is configured to receive the signal generator output signal and compensate a frequency mismatch between a desired signal generator output frequency and the signal generator output frequency generated by the oscillator by providing the fine tuning signal for changing the state of the fine tuning circuit of the oscillator and by providing the coarse tuning signal for changing a state of the coarse tuning circuit of the oscillator. The mismatch compensator provides the coarse tuning signal during a guard period defined in the given communication protocol, during which no RF-signals are transmitted by the transmitter or no RF-signals are to be received by the receiver, such that the state of the coarse tuning circuit is changed within the guard period.
摘要:
An oscillator is disclosed that is tunable to discrete values, and includes a tuning element which can be connected via a switching device. A rectifier circuit is connected to the output of the oscillator and forms a clock signal from the oscillator signal. The oscillator circuit contains a phase delay circuit having a switching input, a clock signal input which is coupled to the output of the rectifier circuit, and a switching output coupled to the switching device. The phase delay circuit has a comparison circuit for comparison of a phase of the clock signal that is applied to the signal input with a reference phase. This phase delay circuit is designed to emit a switching signal after application of an activation signal to the switching input and after the phase of the clock signal which is applied to the signal input matches the reference phase. In consequence, the switching process is delayed until the step-function response of the output signal of the oscillator does not cause a sudden phase change in the clock signal.
摘要:
A signal generator for a transmitter or a receiver for transmitting or receiving RF-signals according to a given communication protocol includes an oscillator and a mismatch compensator. The oscillator is configured to provide a signal generator output signal having a signal generator output frequency and comprises a fine tuning circuit for providing a fine adjustment of the signal generator output frequency based on a fine tuning signal and a coarse tuning circuit for providing a course adjustment of the signal generator output frequency based on a coarse tuning signal. The mismatch compensator is configured to receive the signal generator output signal and compensate a frequency mismatch between a desired signal generator output frequency and the signal generator output frequency generated by the oscillator by providing the fine tuning signal for changing the state of the fine tuning circuit of the oscillator and by providing the coarse tuning signal for changing a state of the coarse tuning circuit of the oscillator. The mismatch compensator provides the coarse tuning signal during a guard period defined in the given communication protocol, during which no RF-signals are transmitted by the transmitter or no RF-signals are to be received by the receiver, such that the state of the coarse tuning circuit is changed within the guard period.
摘要:
A signal delay estimator includes an adjustable delay element for delaying a first signal to obtain a delayed first signal, a delay amount estimator for estimating a delay amount between the delayed first signal and a second signal that is similar and delayed relative to the first signal, and a leading signal determiner for determining whether the delayed first signal leads the second signal or vice versa, and for generating a corresponding binary signal. A selective inverter is provided for selectively inverting the delay amount depending on the binary signal. The signal delay estimator also includes a feedback element to the adjustable delay element for controlling a delay based on an output of the selective inverter. Another exemplary signal delay estimator includes a closed control loop with an adjustable delay element and separate first and second processing paths for absolute delay amount and delay direction, respectively.