公开(公告)号：US20240178260A1

公开(公告)日：2024-05-30

申请号：US18434974

申请日：2024-02-07

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Sing-Chung Hu

IPC: H01L27/146 ,  H01L23/467 ,  H01L31/024

CPC classification number: H01L27/14636 ,  H01L23/467 ,  H01L27/14634 ,  H01L27/1469 ,  H01L31/024

Abstract: Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.

公开(公告)号：US20230307484A1

公开(公告)日：2023-09-28

申请号：US17701632

申请日：2022-03-22

Applicant: Omnivision Technologies, Inc.

Inventor： Shiyu Sun ,  Yuanwei Zheng ,  Gang Chen ,  Sing-Chung Hu ,  Armin Yazdani

IPC: H01L27/146

CPC classification number: H01L27/14656

Abstract: A pixel cell is formed on a semiconductor substrate having a front surface. The pixel cell includes a photodiode, a floating diffusion region, and a transfer gate. The photodiode is disposed in the semiconductor substrate. The floating diffusion region includes a first doped region disposed in the semiconductor substrate, wherein the first doped region extends from the front surface to a first junction depth in the semiconductor substrate. The transfer gate is configured to selectively couple the photodiode to the floating diffusion region controlling charge transfer between the photodiode and the floating diffusion region. The transfer gate includes a planar gate disposed on the front surface of the semiconductor substrate and a pair of vertical gate electrodes. Each vertical gate electrode extending a gate depth from the planar gate into the semiconductor substrate. The first junction depth is greater than the gate depth.

公开(公告)号：US11616088B2

公开(公告)日：2023-03-28

申请号：US16830086

申请日：2020-03-25

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Sing-Chung Hu ,  Seong Yeol Mun ,  Bill Phan

IPC: H01L27/146 ,  H01L29/66 ,  H01L21/762 ,  H01L29/423 ,  H01L29/78

Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. The transistor includes a nonplanar structure disposed in the semiconductor substrate, which is bounded by two outer trench structures formed in the semiconductor substrate. Isolation deposits are disposed within the two outer trench structures formed in the semiconductor substrate. A gate includes a planar gate and two fingers extending into one of two inner trench structures formed in the semiconductor substrate between the nonplanar structure and a respective one of the two outer trench structures. This structure creates an electron channel extending along a plurality of sidewall portions of the nonplanar structure in a channel width plane.

公开(公告)号：US11456328B2

公开(公告)日：2022-09-27

申请号：US16597762

申请日：2019-10-09

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Sing-Chung Hu

IPC: H01L27/146 ,  H01L31/024 ,  H01L23/467

Abstract: Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.

公开(公告)号：US20210305299A1

公开(公告)日：2021-09-30

申请号：US16830086

申请日：2020-03-25

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Chiao-Ti Huang ,  Sing-Chung Hu ,  Yuanwei Zheng

IPC: H01L27/146

Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. The transistor includes a nonplanar structure disposed in the semiconductor substrate, which is bounded by two outer trench structures formed in the semiconductor substrate. Isolation deposits are disposed within the two outer trench structures formed in the semiconductor substrate. A gate includes a planar gate and two fingers extending into one of two inner trench structures formed in the semiconductor substrate between the nonplanar structure and a respective one of the two outer trench structures. This structure creates an electron channel extending along a plurality of sidewall portions of the nonplanar structure in a channel width plane.

公开(公告)号：US20210111212A1

公开(公告)日：2021-04-15

申请号：US16597762

申请日：2019-10-09

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Sing-Chung Hu

IPC: H01L27/146 ,  H01L23/467 ,  H01L31/024

Abstract: Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.

公开(公告)号：US09865642B2

公开(公告)日：2018-01-09

申请号：US14731707

申请日：2015-06-05

Applicant: OmniVision Technologies, Inc.

Inventor： Zhenhong Fu ,  Dajiang Yang ,  Xianmin Yi ,  Gang Chen ,  Sing-Chung Hu ,  Duli Mao

IPC: H01L27/00 ,  H01L27/146

CPC classification number: H01L27/14645 ,  H01L27/14621 ,  H01L27/14649

Abstract: A front-side-interconnect (FSI) red-green-blue-infrared (RGB-IR) photosensor array has photosensors of a first type with a diffused N-type region in a P-type well, the P-type well diffused into a high resistivity semiconductor layer; photosensors of a second type, with a deeper diffused N-type region in a P-type well, the P-type well; and photosensors of a third type with a diffused N-type region diffused into the high resistivity semiconductor layer underlying all of the other types of photosensors. In embodiments, photosensors of a fourth type have a diffused N-type region in a P-type well, the N-type region deeper than the N-type region of photosensors of the first and second types.

公开(公告)号：US09287308B2

公开(公告)日：2016-03-15

申请号：US13858754

申请日：2013-04-08

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Sing-Chung Hu ,  Dajiang Yang ,  Oray Orkun Cellek ,  Hsin-Chih Tai ,  Gang Chen

IPC: H01L31/062 ,  H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14636 ,  H01L27/14643

Abstract: An image sensor pixel includes one or more photodiodes disposed in a semiconductor layer. Pixel circuitry is disposed in the semiconductor layer coupled to the one or more photodiodes. A passivation layer is disposed proximate to the semiconductor layer over the pixel circuitry and the one or more photodiodes. A contact etch stop layer is disposed over the passivation layer. One or more metal contacts are coupled to the pixel circuitry through the contact etch stop layer. One or more isolation regions are defined in the contact etch stop layer that isolate contact etch stop layer material through which the one or more metal contacts are coupled are coupled to the pixel circuitry from the one or more photodiodes.

Abstract translation: 图像传感器像素包括设置在半导体层中的一个或多个光电二极管。 像素电路设置在耦合到一个或多个光电二极管的半导体层中。 钝化层靠近半导体层设置在像素电路和一个或多个光电二极管的上方。 接触蚀刻停止层设置在钝化层上。 一个或多个金属触点通过接触蚀刻停止层耦合到像素电路。 在接触蚀刻停止层中限定一个或多个隔离区，其隔离接触蚀刻停止层材料，一个或多个金属接触通过该接触蚀刻停止层材料从一个或多个光电二极管耦合到像素电路。

公开(公告)号：US20150295007A1

公开(公告)日：2015-10-15

申请号：US14250192

申请日：2014-04-10

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Oray Orkun Cellek ,  Dajiang Yang ,  Sing-Chung Hu ,  Philip John Cizdziel ,  Dyson Tai ,  Gang Chen ,  Cunyu Yang ,  Zhiqiang Lin

IPC: H01L27/146 ,  H01L31/167

CPC classification number: H01L27/14645 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14625 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14649 ,  H01L27/14658 ,  H01L31/167

Abstract: An image sensor pixel includes a photosensitive element, a floating diffusion region, a transfer gate, a dielectric charge trapping region, and a first metal contact. The photosensitive element is disposed in a semiconductor layer to receive electromagnetic radiation along a vertical axis. The floating diffusion region is disposed in the semiconductor layer, while the transfer gate is disposed on the semiconductor layer to control a flow of charge produced in the photosensitive element to the floating diffusion region. The dielectric charge trapping device is disposed on the semiconductor layer to receive electromagnetic radiation along the vertical axis and to trap charges in response thereto. The dielectric charge trapping device is further configured to induce charge in the photosensitive element in response to the trapped charges. The first metal contact is coupled to the dielectric charge trapping device to provide a first bias voltage to the dielectric charge trapping device.

Abstract translation: 图像传感器像素包括感光元件，浮动扩散区域，传输栅极，介电电荷俘获区域和第一金属触点。 感光元件设置在半导体层中以沿垂直轴接收电磁辐射。 浮动扩散区域设置在半导体层中，而传输栅极设置在半导体层上，以控制在感光元件中产生的电荷流向浮动扩散区域。 电介质电荷俘获装置设置在半导体层上以沿垂直轴接收电磁辐射并响应于此捕获电荷。 介电电荷俘获装置还被配置为响应于被捕获的电荷而在感光元件中感应电荷。 第一金属触点耦合到介电电荷俘获装置，以向介电电荷俘获装置提供第一偏置电压。

公开(公告)号：US09054007B2

公开(公告)日：2015-06-09

申请号：US13968210

申请日：2013-08-15

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Sing-Chung Hu ,  Rongsheng Yang ,  Gang Chen ,  Howard E. Rhodes ,  Sohei Manabe ,  Hsin-Chih Tai

IPC: H01L27/146 ,  H01L27/092

CPC classification number: H01L27/14643 ,  H01L27/0928 ,  H01L27/14601 ,  H01L27/1463 ,  H01L27/1464

Abstract: A pixel cell includes a photodiode disposed in an epitaxial layer in a first region of semiconductor material. A floating diffusion is disposed in a well region disposed in the epitaxial layer in the first region. A transfer transistor is disposed in the first region and coupled between the photodiode and the floating diffusion to selectively transfer image charge from the photodiode to the floating diffusion. A deep trench isolation (DTI) structure lined with a dielectric layer inside the DTI structure is disposed in the semiconductor material isolates the first region on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure. Doped semiconductor material inside the DTI structure is selectively coupled to a readout pulse voltage in response to the transfer transistor selectively transferring the image charge from the photodiode to the floating diffusion.

Abstract translation: 像素单元包括设置在半导体材料的第一区域中的外延层中的光电二极管。 浮置扩散部设置在设置在第一区域的外延层中的阱区域中。 传输晶体管设置在第一区域中并且耦合在光电二极管和浮动扩散之间以选择性地将图像电荷从光电二极管转移到浮动扩散。 在DTI结构内部布置有介电层的深沟槽隔离（DTI）结构设置在半导体材料中，将DTI结构的一侧上的第一区域与DTI结构的另一侧上的半导体材料的第二区域隔离开 。 响应于传输晶体管选择性地将图像电荷从光电二极管转移到浮动扩散，DTI结构内部的掺杂半导体材料选择性地耦合到读出脉冲电压。