公开(公告)号：US08074139B2

公开(公告)日：2011-12-06

申请号：US11819290

申请日：2007-06-26

申请人： Tadanori Tezuka ,  Tsutomu Sekibe ,  Shunichi Kuromaru ,  Junji Michiyama ,  Hiroshi Nakamura ,  Masaaki Kondo ,  Takashi Nanya ,  Masashi Imai ,  Nassu Tomoyuki Bogdan

发明人： Tadanori Tezuka ,  Tsutomu Sekibe ,  Shunichi Kuromaru ,  Junji Michiyama ,  Hiroshi Nakamura ,  Masaaki Kondo ,  Takashi Nanya ,  Masashi Imai ,  Nassu Tomoyuki Bogdan

IPC分类号： H04L1/18

CPC分类号： H04L1/0025 ,  H04L51/063 ,  H04L67/32

摘要： A request change unit outputs a command as a request under control of a judgment control unit. A response condition determination unit determines a condition that is to be matched by a correct response which is to be returned from the other device-in-communication in reply to the command if the other device-in-communication operates in conformity with a protocol. A check unit checks a response received from the other device-in-communication in reply to the command, against the condition. If the received response does not match the condition but is correctable to match the condition as a result of the check, a response correction unit corrects the received response to match the condition under control of the judgment control unit.

摘要翻译： 请求改变单元在判断控制单元的控制下输出作为请求的命令。 响应条件确定单元如果其他设备在通信中的协议一致地操作，则确定要从其他设备在通信中返回的正确响应匹配的条件。 检查单元根据该条件检查从其他通信设备接收的响应于该命令的响应。 如果接收到的响应与条件不匹配，但是作为检查结果可以校正以匹配条件，则响应校正单元校正所接收的响应以与判断控制单元的控制下的条件相匹配。

公开(公告)号：US20100202329A1

公开(公告)日：2010-08-12

申请号：US12676433

申请日：2009-07-21

申请人： Shinichiro Nishioka ,  Tsutomu Sekibe

发明人： Shinichiro Nishioka ,  Tsutomu Sekibe

IPC分类号： H04L5/16

CPC分类号： H04L5/14 ,  H04L5/16

摘要： In a communication system for performing communication while switching between full-duplex communication and half-duplex communication, a slave 200, which receives command packet signals requesting to write or read data from the master 100, houses information, in a response packet signal, that specifies half-duplex communication in response to one of the received packet signals, and transmits the response packet signal to the master, when the number of the received command packet signals has reached the maximum number of the command packet signals storable in a command signal queue 252.

摘要翻译： 在用于在全双工通信和半双工通信之间切换时执行通信的通信系统中，接收请求从主设备100写入或读取数据的命令分组信号的从机200在响应分组信号中容纳该信息 指定响应于所接收的分组信号之一的半双工通信，并且当接收到的命令分组信号的数量已达到可存储在命令信号队列中的命令分组信号的最大数目时，将响应分组信号发送给主机 252。

公开(公告)号：US07343087B2

公开(公告)日：2008-03-11

申请号：US10702840

申请日：2003-11-06

申请人： Toshiyuki Ishioka ,  Tsutomu Sekibe

发明人： Toshiyuki Ishioka ,  Tsutomu Sekibe

IPC分类号： H04N5/00

CPC分类号： H04N21/23406 ,  H04N19/103 ,  H04N19/164 ,  H04N19/172 ,  H04N19/44 ,  H04N19/61 ,  H04N21/4305 ,  H04N21/44004

摘要： When advance prediction is conducted for overflows and underflows, which are both types of buffer errors, and the occurrence of a buffer error is predicted, frames that a viewer will be unlikely to notice even if playback is omitted or conducted for a different duration from a predetermined standard duration are omitted or played for a different playback duration.

摘要翻译： 当进行溢出和下溢的预测，这两种类型的缓冲器错误和缓冲器错误的发生都被预测到，即使在不同的持续时间内省略或进行回放，观察者也不可能注意到的帧 对于不同的播放持续时间，省略或播放预定的标准持续时间。

公开(公告)号：US20070198859A1

公开(公告)日：2007-08-23

申请号：US11653899

申请日：2007-01-17

申请人： Shunji Harada ,  Yuichi Futa ,  Masaya Miyazaki ,  Tsutomu Sekibe ,  Yoshiaki Nakanishi ,  Natsume Matsuzaki

发明人： Shunji Harada ,  Yuichi Futa ,  Masaya Miyazaki ,  Tsutomu Sekibe ,  Yoshiaki Nakanishi ,  Natsume Matsuzaki

IPC分类号： H04L9/32

CPC分类号： G11B20/0021 ,  G06F21/10 ,  G11B20/00086 ,  G11B20/00224 ,  G11B20/00246 ,  G11B20/00731

摘要： A server apparatus encrypts content, based on a distribution key, and transmits the encrypted content to a PC via a network. The PC, to which a memory card is connected, outputs the received encrypted content to the memory card. The memory card decrypts the encrypted content using the distribution key, converts the data format of the decrypted content, encrypts the content using a medium unique key that is unique to the memory card, and records the resulting re-encrypted content internally. A playback apparatus decrypts the re-encrypted content using the medium unique key, and plays back the decrypted content.

摘要翻译： 服务器装置根据配送密钥对内容进行加密，经由网络将加密后的内容发送到PC。 存储卡连接到的PC将接收到的加密内容输出到存储卡。 存储卡使用分发密钥解密加密内容，转换解密内容的数据格式，使用存储卡唯一的中等唯一密钥对内容进行加密，并在内部记录生成的重新加密的内容。 播放装置使用媒体唯一密钥解密重新加密的内容，并且重放解密的内容。

公开(公告)号：US06891950B1

公开(公告)日：2005-05-10

申请号：US09652157

申请日：2000-08-31

申请人： Motoji Oomori ,  Kaoru Yokota ,  Tsutomu Sekibe ,  Makoto Tatebayashi ,  Fumihiko Sano ,  Shinichi Kawamura

发明人： Motoji Oomori ,  Kaoru Yokota ,  Tsutomu Sekibe ,  Makoto Tatebayashi ,  Fumihiko Sano ,  Shinichi Kawamura

IPC分类号： G06F1/00 ,  H04L9/06 ,  H04L9/00 ,  H04K1/00 ,  H04K1/04 ,  H04K1/06

CPC分类号： H04L9/0625 ,  H04L2209/08 ,  H04L2209/122 ,  H04L2209/125 ,  H04L2209/24

摘要： There are disclosed an extended key generator, encryption/decryption unit, and storage medium, in which as each of key transform functions, a transform process is done by an S box (substitution table) on the basis of a first key obtained from the inputted key, and an adder computes a corresponding one of extended keys on the basis of a value obtained by shifting the transformed result of the S box to the left, and a second key obtained from the inputted key.

摘要翻译： 公开了一种扩展密钥生成器，加密/解密单元和存储介质，其中，作为每个密钥变换功能，基于从输入的第一密钥获得的第一密钥通过S盒（替代表）完成变换处理 密钥，并且加法器基于通过将S盒的变换结果向左移位而获得的值和从输入的密钥获得的第二密钥来计算相应的一个扩展密钥。

公开(公告)号：US06842104B1

公开(公告)日：2005-01-11

申请号：US09526154

申请日：2000-03-15

申请人： Masataka Osaka ,  Tsutomu Sekibe

发明人： Masataka Osaka ,  Tsutomu Sekibe

IPC分类号： G06F13/00 ,  G06F13/40 ,  H03K17/00

CPC分类号： G06F13/4022 ,  G06F13/4031

摘要： A cross-bus switch apparatus which establishes simultaneously two or more pairs of connections between (i) a source bus arbitrarily selected from a plurality of source buses connected to one or more source apparatuses and (ii) a destination bus arbitrarily selected from a plurality of destination buses connected to one or more destination apparatuses. The cross-bus switch apparatus includes: a plurality of cross-bus switch units. The plurality of source buses are grouped into a plurality of source bus groups which are each connected to one of the plurality of cross-bus switch units. The plurality of destination buses are grouped into a plurality of destination bus groups which are each connected to one of the plurality of cross-bus switch units. Each cross-bus switch unit is connected to either (i) a source bus group or a destination bus group, or (ii) a source bus group and a destination bus group.

摘要翻译： 一种交叉总线开关装置，其在（i）从连接到一个或多个源装置的多个源总线任意选择的源总线和（ii）从多个源装置中任意选择的目的地总线之间同时建立两对或更多对连接 连接到一个或多个目的地设备的目的地总线。 交叉总线开关装置包括：多个交叉总线开关单元。 多个源总线被分组成多个源总线组，每个源总线组各自连接到多个交叉总线开关单元中的一个。 多个目的地总线被分组为多个目的地总线组，其各自连接到多个交叉总线开关单元中的一个。 每个交叉总线开关单元连接到（i）源总线组或目的地总线组，或者（ii）源总线组和目的地总线组。

公开(公告)号：US06665757B1

公开(公告)日：2003-12-16

申请号：US09545279

申请日：2000-04-07

申请人： Shoichi Tsujita ,  Masaru Fujii ,  Tatsuhiro Hosokawa ,  Tsutomu Sekibe ,  Hiroshi Sakurai ,  Hideki Kawai

发明人： Shoichi Tsujita ,  Masaru Fujii ,  Tatsuhiro Hosokawa ,  Tsutomu Sekibe ,  Hiroshi Sakurai ,  Hideki Kawai

IPC分类号： G06F1342

CPC分类号： G06F13/4081 ,  Y02D10/14 ,  Y02D10/151

摘要： A communication interface of the present invention includes a clock signal line, a first signal line, a second signal line and one or more data signal lines as communication signal lines between a master system and a slave system.

摘要翻译： 本发明的通信接口包括作为主系统和从系统之间的通信信号线的时钟信号线，第一信号线，第二信号线和一个或多个数据信号线。

公开(公告)号：US20110196994A1

公开(公告)日：2011-08-11

申请号：US12675460

申请日：2008-08-12

申请人： Masaaki Harada ,  Tomohiko Kitamura ,  Tsutomu Sekibe

发明人： Masaaki Harada ,  Tomohiko Kitamura ,  Tsutomu Sekibe

IPC分类号： G06F13/28

CPC分类号： G06F13/28 ,  G06F21/85

摘要： A DMA control device and a data transfer method, which make it possible to use a DMA channel independent of an operation mode of a processor and realize the protection of DMA control parameters during DMA operation (during a data transfer), while reducing the number of shift of an operating mode of the processor as small as possible, are provided. In requesting a DMA start by locking an access to a ch-0 DMA control register 114 in a secure mode, a CPU 101 instructs an unlock set register 118 to release an access lock when the transfer is completed. Then, when a parameter controlling circuit 119 receives a notification of transfer completion from a ch-0 state managing circuit 116, such parameter controlling circuit instructs a lock set register 115 to release the lock in accordance with the setting of the unlock set register 118.

摘要翻译： 一种DMA控制装置和数据传输方法，其可以独立于处理器的操作模式使用DMA通道，并且在DMA操作期间（在数据传输期间）实现对DMA控制参数的保护，同时减少 提供了尽可能小的处理器的操作模式的移动。 在通过在安全模式下锁定对ch-0 DMA控制寄存器114的访问来请求DMA开始时，CPU 101指示解锁设置寄存器118在传送完成时释放访问锁定。 然后，当参数控制电路119从ch-0状态管理电路116接收到传送完成的通知时，该参数控制电路根据解锁设定寄存器118的设定指示锁定设定寄存器115释放锁定。

公开(公告)号：US20110103224A1

公开(公告)日：2011-05-05

申请号：US12674045

申请日：2009-06-11

申请人： Shinichiro Nishioka ,  Hiroshi Suenaga ,  Tsutomu Sekibe ,  Isao Kato ,  Tadashi Ono ,  Hideyuki Yamada

发明人： Shinichiro Nishioka ,  Hiroshi Suenaga ,  Tsutomu Sekibe ,  Isao Kato ,  Tadashi Ono ,  Hideyuki Yamada

IPC分类号： H04L5/14 ,  H04L12/26

CPC分类号： H04L25/0272 ,  H04L5/14 ,  H04L5/1438 ,  H04L5/16

摘要： A data communication system for starting transmission and reception of target data for processing upon recognition that switching between communication modes is completed. The data communication system includes a master communication device and a slave communication device that continuously perform, at a time of switching from half-duplex communication to full-duplex communication, (i) a handshake using a directional control code indicating the switching and a preamble code indicating completion of the switching and (ii) a handshake using the preamble code and an acknowledge code indicating receipt of the preamble code, whereby each of the devices recognizes that the switching between communication modes by the opposite device is completed and starts transmission and reception of the target data.

摘要翻译： 一种数据通信系统，用于在识别出完成通信模式之间的切换的情况下开始用于处理的目标数据的发送和接收。 数据通信系统包括在从半双工通信切换到全双工通信时连续执行主通信设备和从通信设备，（i）使用指示切换的方向控制代码的握手和前导码 指示切换完成的代码和（ii）使用前导码的握手和指示接收前导码的确认代码，由此每个设备识别出相对设备的通信模式之间的切换完成并开始发送和接收 的目标数据。

公开(公告)号：USRE42263E1

公开(公告)日：2011-03-29

申请号：US11896278

申请日：2007-08-30

申请人： Masayuki Toyama ,  Tsutomu Sekibe

发明人： Masayuki Toyama ,  Tsutomu Sekibe

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F12/0292 ,  G06F2212/2022 ,  G06F2212/7201

摘要： A memory device with a nonvolatile memory and RAM for accessing the nonvolatile memory is generally provided with a table to convert a logical address to a physical address, however, in the invention, the table is divided to a first table on RAM and a second table on the nonvolatile memory. The first table converts specific bits of the logical address to a first physical address indicating a location of the second table. The second table converts the other bits of the logical address to a physical address of a representative page of pages contained in a storage area corresponding to the logical address. A unit operable to access data (a writing unit operable to, a reading unit operable to, and an erasing unit operable to) reaches a target physical address based on the logical address. Such configuration can reduce the capacity of each conversion table.

摘要翻译： 具有用于访问非易失性存储器的非易失性存储器和RAM的存储器件通常设置有用于将逻辑地址转换为物理地址的表，然而，在本发明中，该表被划分为RAM上的第一表和第二表 在非易失性存储器上。 第一表将逻辑地址的特定比特转换成指示第二表的位置的第一物理地址。 第二表将逻辑地址的其他位转换为与逻辑地址对应的存储区域中包含的页面的代表页的物理地址。 可操作以访问数据的单元（可操作的读取单元，可操作的读取单元和可擦除单元）可以基于逻辑地址到达目标物理地址。 这样的配置可以减少每个转换表的容量。