公开(公告)号：US20080217699A1

公开(公告)日：2008-09-11

申请号：US12069940

申请日：2008-02-14

申请人： Donald R. Disney ,  Richard K. Williams

发明人： Donald R. Disney ,  Richard K. Williams

IPC分类号： H01L49/00

CPC分类号： H01L21/76243 ,  H01L21/761 ,  H01L21/76267 ,  H01L21/763 ,  H01L21/8222 ,  H01L21/82285 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0825 ,  H01L27/0826 ,  H01L29/1004 ,  H01L29/41708 ,  H01L29/732

摘要： An isolated bipolar transistor formed in a P-type semiconductor substrate includes an N-type submerged floor isolation region and a filled trench extending downward from the surface of the substrate to the floor isolation region. Together the floor isolation region and the filled trench form an isolated pocket of the substrate which contains the bipolar transistor. The collector of the bipolar transistor may comprise the floor isolation region. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same.

摘要翻译： 形成在P型半导体衬底中的隔离双极型晶体管包括N型浸没式隔离区和从衬底表面向底部隔离区向下延伸的填充沟槽。 底部隔离区域和填充的沟槽一起形成包含双极晶体管的衬底的隔离袋。 双极晶体管的集电极可以包括地板隔离区域。 衬底不含有外延层，从而克服了与其制造相关的许多问题。

公开(公告)号：US07422938B2

公开(公告)日：2008-09-09

申请号：US10918316

申请日：2004-08-14

申请人： Richard K. Williams ,  Michael E. Cornell ,  Wai Tien Chan

发明人： Richard K. Williams ,  Michael E. Cornell ,  Wai Tien Chan

IPC分类号： H01L21/8234

CPC分类号： H01L21/26513 ,  H01L21/743 ,  H01L21/761 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0629 ,  H01L27/0928 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/42368 ,  H01L29/66136 ,  H01L29/6625 ,  H01L29/735 ,  H01L29/7816 ,  H01L29/8611 ,  H01L2924/0002 ,  H01L2924/00

摘要： An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does not diffuse significantly. As a result, the dimensions of the isolation structure are limited and defined, thereby allowing a higher packing density than obtainable using conventional processes which include the growth of an epitaxial layer and diffusion of the dopants. In one group of embodiments, the isolation structure includes a deep layer and a sidewall which together form a cup-shaped structure surrounding an enclosed region in which the isolated semiconductor device may be formed. The sidewalls may be formed by a series of pulsed implants at different energies, thereby creating a stack of overlapping implanted regions.

公开(公告)号：US20080197908A1

公开(公告)日：2008-08-21

申请号：US12032672

申请日：2008-02-16

申请人： Richard K. Williams

发明人： Richard K. Williams

IPC分类号： H03K17/687

CPC分类号： H02M3/155 ,  H01L29/8128

摘要： A cascode power switch for use in a MESFET based switching regulator includes a MOSFET in series with a normally-off MESFET. The cascode power switch is typically connected in between a power source and a node Vx. The node Vx is connected to an output node via an inductor and to ground via a Schottky diode or a second MESFET or both. A control circuit drives the MESFET (and the second MESFET) so that the inductor is alternately connected to the battery and to ground. The MOSFET is switched off during sleep or standby modes to minimize leakage current through the MESFET. The MOSFET is therefore switched at a low frequency compared to the MESFET and does not contribute significantly to switching losses in the converter.

摘要翻译： 用于基于MESFET的开关稳压器的共源共栅电源开关包括与常闭MESFET串联的MOSFET。 共源共栅电源开关通常连接在电源和节点Vx之间。 节点Vx通过电感器连接到输出节点，并通过肖特基二极管或第二MESFET或两者接地。 控制电路驱动MESFET（和第二MESFET），使得电感器交替地连接到电池和接地。 在睡眠或待机模式期间，MOSFET关闭，以最大限度地减少通过MESFET的漏电流。 因此，与MESFET相比，MOSFET以低频率切换，并且对转换器中的开关损耗没有显着影响。

公开(公告)号：US20080197408A1

公开(公告)日：2008-08-21

申请号：US12072619

申请日：2008-02-27

申请人： Donald R. Disney ,  Richard K. Williams

发明人： Donald R. Disney ,  Richard K. Williams

IPC分类号： H01L29/06

CPC分类号： H01L29/7809 ,  H01L21/26586 ,  H01L29/0615 ,  H01L29/0626 ,  H01L29/063 ,  H01L29/0638 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/086 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/41766 ,  H01L29/7811 ,  H01L29/7835 ,  H01L29/808 ,  H01L29/8613 ,  H01L29/866

摘要： Various integrated circuit devices, in particular a quasi-vertical DMOS transistor, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described.

摘要翻译： 在隔离结构内形成有各种集成电路器件，特别是准垂直DMOS晶体管，该隔离结构包括底板隔离区域和从衬底表面延伸到地板隔离区域的沟槽。 沟槽可以填充有介电材料，或者可以在中间部分具有导电材料，其中介电层衬在沟槽的壁上。 描述了通过使用保护环将基底隔离区域延伸超过沟槽并形成漂移区域来终止隔离结构的各种技术。

公开(公告)号：US20080158915A1

公开(公告)日：2008-07-03

申请号：US11890818

申请日：2007-08-08

申请人： Richard K. Williams

发明人： Richard K. Williams

IPC分类号： H02M3/335

CPC分类号： H02M3/07 ,  H02M3/1588 ,  H02M2001/007 ,  Y02B70/1466

摘要： A DC/DC converter includes a pre-regulator stage, which may include a Buck converter, and a post-converter stage, which may include a charge pump. The duty factor of the pre-regulator stage is controlled by a feedback path that extends from the output terminal of the pre-regulator stage or the post-converter stage. The pre-regulator steps the input DC voltage down by a variable amount depending on the duty factor, and the post-converter steps the voltage at the output of the pre-regulator up or down by an positive or negative integral or fractional value. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.

摘要翻译： DC / DC转换器包括预调节器级，其可以包括降压转换器和后转换器级，其可以包括电荷泵。 预调节器级的占空因数由从预调节器级或后转换器级的输出端延伸的反馈路径控制。 预调节器根据占空比将输入DC电压降低可变量，后变换器将预调节器输出端的电压上升或下降一个正或负的积分或分数值。 该转换器克服了噪声毛刺的问题，调节不良和不稳定性，甚至接近一致的输入/输出电压转换比。

公开(公告)号：US20080157733A1

公开(公告)日：2008-07-03

申请号：US11890956

申请日：2007-08-08

申请人： Richard K. Williams

发明人： Richard K. Williams

IPC分类号： G05F1/00 ,  H02M3/335

CPC分类号： H02M3/07 ,  H02M3/1588 ,  H02M2001/007 ,  Y02B70/1466

摘要： A DC/DC converter includes a pre-regulator stage, which may include a boost converter, and a post-converter stage, which may include a charge pump. The duty factor of the pre-regulator stage is controlled by a feedback path that extends from the output terminal of the pre-regulator stage or the post-converter stage. The pre-regulator steps the input DC voltage up by a variable amount depending on the duty factor, and the post-converter steps the voltage at the output of the pre-regulator up or down by an positive or negative integral or fractional value. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.

摘要翻译： DC / DC转换器包括预调节器级，其可以包括升压转换器和后转换器级，其可以包括电荷泵。 预调节器级的占空因数由从预调节器级或后转换器级的输出端延伸的反馈路径控制。 预调节器根据占空因数将输入直流电压向上移动一个可变量，后变换器将预调节器输出端的电压上升或下降一个正或负的积分或分数值。 该转换器克服了噪声毛刺的问题，调节不良和不稳定性，甚至接近一致的输入/输出电压转换比。

公开(公告)号：US07391589B2

公开(公告)日：2008-06-24

申请号：US11730509

申请日：2007-04-02

申请人： Daniel E. Boss ,  Richard K. Williams

发明人： Daniel E. Boss ,  Richard K. Williams

IPC分类号： G11B33/14 ,  G11B5/127

CPC分类号： G11B25/043 ,  G11B33/08 ,  Y10T29/49025

摘要： A disc drive assembly is provided including a head disc assembly, a housing having a base and a cover cooperating with one another to form a chamber in which the head disc assembly is housed, and a damper structure in operative association with the housing for dampening noise and/or vibration emanated from the head disc assembly. The damper structure includes a viscoelastic damper layer and a continuous, polymeric constraining layer intimately contacting and encasing the viscoelastic damper layer. The constraining layer has a greater stiffness and higher modulus of dynamic shearing elasticity than the viscoelastic damper layer, and is molded from a high density filler and a moldable compound that is immiscible with the viscoelastic damper layer to provide a discrete interface between the constraining layer and the viscoelastic damper layer.

摘要翻译： 提供了一种盘驱动器组件，其包括头盘组件，具有基座和与彼此配合的盖的壳体，以形成其中容纳头盘组件的腔室，以及与壳体可操作地相关联的阻尼器结构，用于抑制噪音 和/或从头盘组件发出的振动。 阻尼器结构包括粘弹性阻尼层和紧密接触和包裹粘弹性阻尼层的连续聚合约束层。 约束层具有比粘弹性阻尼层更大的刚度和更高的动态剪切弹性模量，并且由高密度填料和可模制化合物模制而成，其与粘弹性阻尼层不混溶，以在约束层和 粘弹阻尼层。

公开(公告)号：US20080116513A1

公开(公告)日：2008-05-22

申请号：US11980228

申请日：2007-10-30

申请人： Richard K. Williams ,  Michael E. Cornell ,  Wai Tien Chan

发明人： Richard K. Williams ,  Michael E. Cornell ,  Wai Tien Chan

IPC分类号： H01L27/092

CPC分类号： H01L29/7816 ,  H01L21/26513 ,  H01L21/2652 ,  H01L21/74 ,  H01L21/743 ,  H01L21/76216 ,  H01L21/76218 ,  H01L21/82285 ,  H01L21/823481 ,  H01L21/823493 ,  H01L21/823878 ,  H01L21/823892 ,  H01L21/8249 ,  H01L27/0623 ,  H01L27/0922 ,  H01L29/4232 ,  H01L29/4238 ,  H01L29/66272 ,  H01L29/7322 ,  H01L29/7809 ,  H01L29/7813 ,  H01L29/7835

摘要： A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.

公开(公告)号：US20070278612A1

公开(公告)日：2007-12-06

申请号：US11444102

申请日：2006-05-31

申请人： Richard K. Williams ,  Donald Ray Disney ,  Jun-Wei Chen ,  Wai Tien Chan ,  HyungSik Ryu

发明人： Richard K. Williams ,  Donald Ray Disney ,  Jun-Wei Chen ,  Wai Tien Chan ,  HyungSik Ryu

IPC分类号： H01L29/00

CPC分类号： H01L29/0646 ,  H01L21/26513 ,  H01L21/761 ,  H01L21/76224 ,  H01L21/76237 ,  H01L21/76243 ,  H01L21/76267 ,  H01L21/763 ,  H01L21/823481 ,  H01L21/823878 ,  H01L21/823892 ,  H01L29/0649 ,  H01L2924/0002 ,  H01L2924/00

摘要： A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.

摘要翻译： 用于半导体衬底的各种隔离结构包括形成在衬底中的沟槽，其填充有电介质材料或填充有导电材料并且沿着沟槽的壁衬有介电层。 沟槽可以与掺杂的侧壁隔离区域组合使用。 沟槽和侧壁隔离区域都可以是环形的并且包围衬底的隔离袋。 隔离结构通过不包括显着的热处理或掺杂剂扩散的模块化注入和蚀刻工艺形成，使得所得到的结构是紧凑的并且可以紧密地堆积在衬底的表面中。

公开(公告)号：US07279378B2

公开(公告)日：2007-10-09

申请号：US11067248

申请日：2005-02-25

申请人： Richard K. Williams ,  Michael E. Cornell ,  Wai Tien Chan

发明人： Richard K. Williams ,  Michael E. Cornell ,  Wai Tien Chan

IPC分类号： H01L21/8238 ,  H01L21/425

CPC分类号： H01L21/26513 ,  H01L21/743 ,  H01L21/761 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0629 ,  H01L27/0928 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/42368 ,  H01L29/66136 ,  H01L29/6625 ,  H01L29/735 ,  H01L29/7816 ,  H01L29/8611 ,  H01L2924/0002 ,  H01L2924/00

摘要： An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does not diffuse significantly. As a result, the dimensions of the isolation structure are limited and defined, thereby allowing a higher packing density than obtainable using conventional processes which include the growth of an epitaxial layer and diffusion of the dopants. In one group of embodiments, the isolation structure includes a deep layer and a sidewall which together form a cup-shaped structure surrounding an enclosed region in which the isolated semiconductor device may be formed. The sidewalls may be formed by a series of pulsed implants at different energies, thereby creating a stack of overlapping implanted regions.

摘要翻译： 通过将掺杂剂注入到不包括外延层的半导体衬底中来形成用于电绝缘半导体器件的结构。 在植入后，该结构暴露于非常有限的热预算，使得掺杂剂不显着扩散。 结果，隔离结构的尺寸受限制和限定，从而允许比使用包括外延层生长和掺杂剂扩散的常规工艺可获得更高的堆积密度。 在一组实施例中，隔离结构包括深层和侧壁，其一起形成围绕可以形成隔离半导体器件的封闭区域的杯形结构。 侧壁可以由不同能量的一系列脉冲植入物形成，由此产生一叠重叠的注入区域。