公开(公告)号：US20240260274A1

公开(公告)日：2024-08-01

申请号：US18414933

申请日：2024-01-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dukhyun CHOE ,  Jinseong HEO ,  Hyunjae LEE ,  Seunggeol NAM ,  Yoonsang PARK ,  Sijung YOO

IPC: H10B51/20 ,  H01L21/28 ,  H01L29/51 ,  H01L29/78 ,  H10B53/20

CPC classification number: H10B51/20 ,  H01L29/40111 ,  H01L29/516 ,  H01L29/78391 ,  H10B53/20

Abstract: Provided are a memory device implementing multi-bit functionality and a memory apparatus including the memory device. The memory device includes a semiconductor substrate, a gate electrode on the semiconductor substrate, and a plurality of ferroelectric layers laminated between the semiconductor substrate and the gate electrode in a first direction perpendicular to a surface of the semiconductor substrate and including at least one first ferroelectric layer and at least one second ferroelectric layer. The first ferroelectric layer has a doping concentration gradient in which a doping concentration increases in the first direction, and the second ferroelectric layer has a doping concentration gradient in which a doping concentration decreases in the first direction. The memory device is configured to implement multi-bit functionality according to an operating voltage.

公开(公告)号：US20240196623A1

公开(公告)日：2024-06-13

申请号：US18531922

申请日：2023-12-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunseong LEE ,  Jinseong HEO ,  Kihong KIM ,  Dukhyun CHOE ,  Hyunjae LEE ,  Sanghyun JO

IPC: H10B51/20 ,  H01L21/28 ,  H01L29/51 ,  H01L29/66 ,  H01L29/78 ,  H10B53/20

CPC classification number: H10B51/20 ,  H01L29/40111 ,  H01L29/516 ,  H01L29/6684 ,  H01L29/78391 ,  H10B53/20

Abstract: An electronic device may include a conductive material layer, a ferroelectric layer covering the conductive material layer, and an electrode covering the ferroelectric layer. The ferroelectric layer may include a compound represented by HfxAyOz, where 0≤x≤1, 0≤y≤1, and 2(x+y)

公开(公告)号：US20240172448A1

公开(公告)日：2024-05-23

申请号：US18492130

申请日：2023-10-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunggeol NAM ,  Jinseong HEO ,  Hyunjae LEE ,  Dukhyun CHOE

IPC: H10B51/20 ,  H01L21/28 ,  H01L29/51 ,  H01L29/78 ,  H10B51/10

CPC classification number: H10B51/20 ,  H01L29/40111 ,  H01L29/516 ,  H01L29/78391 ,  H10B51/10

Abstract: A three-dimensional (3D) ferroelectric memory device may include a substrate; a plurality of insulating layers stacked on the substrate; a plurality of gate electrodes between the plurality of insulating layers; a plurality of ferroelectric layers in contact with the plurality of gate electrodes; a plurality of intermediate electrodes in contact with the plurality of ferroelectric layers and protruding from side surfaces of the plurality of insulating layers; a gate insulating layer in contact with the plurality of intermediate electrodes and the plurality of insulating layers; and a channel layer in contact with the gate insulating layer.

公开(公告)号：US20230099577A1

公开(公告)日：2023-03-30

申请号：US17953491

申请日：2022-09-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Hagyoul BAE ,  Seunggeol NAM ,  Hyunjae LEE ,  Dukhyun CHOE

IPC: G11C15/04

Abstract: Provided is a content-addressable memory. The content-addressable memory may include a memory cell connected to a match line, a word line, and a search line, and the memory cell includes a first channel layer and a second channel layer doped with different dopants.

公开(公告)号：US20230076633A1

公开(公告)日：2023-03-09

申请号：US17902142

申请日：2022-09-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungkun KANG ,  Chawon KOH ,  Hyunjae LEE ,  Tsunehiro NISHI

IPC: H01L21/027 ,  H01L21/311 ,  H01J37/32 ,  G03F7/004

Abstract: A method of manufacturing a semiconductor device, the method including forming a lower film on a substrate; forming a metal-containing photoresist material film on the lower film; patterning the metal-containing photoresist material film to form a photoresist pattern including openings therein such that a scum remains on the lower film; performing a descum operation to remove the scum from the lower film; and etching the lower film using the photoresist pattern, wherein performing the descum operation includes providing the substrate to a processing chamber; generating oxygen plasma; and reacting the scum with the oxygen plasma.

公开(公告)号：US20210292900A1

公开(公告)日：2021-09-23

申请号：US17333820

申请日：2021-05-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soyoung LEE ,  Hyunjae LEE ,  Ik Soo KIM ,  Jang-Hee LEE

IPC: C23C16/455 ,  H01L21/02 ,  C23C16/44 ,  C23C16/448

Abstract: Provided are a precursor supply unit, a substrate processing system, and a method of fabricating a semiconductor device using the same. The precursor supply unit may include an outer container, an inner container provided in the outer container and used to store a precursor source, a gas injection line having an injection port, which is provided below the inner container and in the outer container and is used to provide a carrier gas into the outer container, and a gas exhaust line having an exhaust port, which is provided below the inner container and in the outer container and is used to exhaust the carrier gas in the outer container and a precursor produced from the precursor source.