公开(公告)号：US09959933B2

公开(公告)日：2018-05-01

申请号：US15670290

申请日：2017-08-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ho-Jun Lee ,  Sang-Hyun Joo

IPC: G11C29/00 ,  G11C16/34 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/08 ,  G11C16/04

CPC classification number: G11C16/3495 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/3445 ,  G11C16/3459 ,  G11C29/021 ,  G11C29/028 ,  G11C29/12005 ,  G11C29/26 ,  G11C29/50004 ,  G11C2029/0409 ,  G11C2029/1202 ,  G11C2029/1204

Abstract: A method of operating a non-volatile memory device includes selecting a first select transistor from among a plurality of select transistors included in a NAND string, and performing a check operation on a first threshold voltage of the first select transistor. The check operation includes comparing the first threshold voltage with a first lower-limit reference voltage level, and performing a program operation on the first select transistor when the first threshold voltage is lower than the first lower-limit reference voltage level. When the first threshold voltage is equal to or higher than the first lower-limit reference voltage level, the check operation on the first threshold voltage is ended.

公开(公告)号：US08953385B2

公开(公告)日：2015-02-10

申请号：US14071020

申请日：2013-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Hyun Joo

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/04 ,  G11C7/00 ,  G11C16/30 ,  G11C11/56

CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/30 ,  G11C16/3404 ,  G11C16/3454 ,  G11C16/3459

Abstract: A non-volatile memory device is provided. The non-volatile memory device includes a cell string including a plurality of non-volatile memory cells; and an operation control block configured to supply a program voltage to a word line connected to a selected non-volatile memory cell among the plurality of non-volatile memory cells during a program operation, configured to supply a first negative voltage to the word line during a detrapping operation, and configured to supply a second negative voltage as a verify voltage to the word line during a program verify operation.

Abstract translation: 提供了一种非易失性存储器件。 非易失性存储器件包括包括多个非易失性存储器单元的单元串; 以及操作控制块，其被配置为在编程操作期间向连接到所述多个非易失性存储单元中的所选择的非易失性存储单元的字线提供编程电压，用于在编程期间向所述字线提供第一负电压 取样操作，并且被配置为在程序验证操作期间将第二负电压作为验证电压提供给字线。

公开(公告)号：US20130250678A1

公开(公告)日：2013-09-26

申请号：US13718105

申请日：2012-12-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Hyun Joo ,  Il-Han Park ,  Ki-Hwan Song

IPC: G11C11/24 ,  G11C16/02

CPC classification number: G11C11/24 ,  G11C16/02 ,  G11C16/10 ,  G11C2216/14

Abstract: A page buffer comprises a static latch configured to store data received from an external device, and a dynamic latch configured to receive the data stored in the static latch through a floating node, the dynamic latch comprising a storage capacitor, a write transistor configured to write the data of the floating node to the storage capacitor, and a read transistor configured to read the data of the storage capacitor, and the write transistor and the read transistor sharing the floating node.

Abstract translation: 页面缓冲器包括被配置为存储从外部设备接收的数据的静态锁存器和配置成通过浮动节点接收存储在静态锁存器中的数据的动态锁存器，该动态锁存器包括存储电容器，写入晶体管被配置为写入 浮动节点到存储电容器的数据，以及被配置为读取存储电容器的数据的读取晶体管，以及共享浮动节点的写入晶体管和读取晶体管。