公开(公告)号：US11462571B2

公开(公告)日：2022-10-04

申请号：US17086595

申请日：2020-11-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Young-Wook Lee ,  Jang-Soo Kim

IPC: G02F1/1362 ,  H01L27/12 ,  G02F1/1365 ,  G02F1/1368 ,  G02F1/1343

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

公开(公告)号：US10896920B2

公开(公告)日：2021-01-19

申请号：US16438385

申请日：2019-06-11

Applicant: Samsung Display Co., Ltd.

Inventor： Young-Wook Lee ,  Woo-Geun Lee ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Ji-Soo Oh

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/768

Abstract: A substrate including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a source electrode electrically connected to the oxide semiconductor layer pattern, a drain electrode electrically connected to the oxide semiconductor layer, the drain electrode spaced apart from the source electrode, and an insulating pattern including a first portion, which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

公开(公告)号：US10825841B2

公开(公告)日：2020-11-03

申请号：US15981090

申请日：2018-05-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Young-Wook Lee ,  Jang-Soo Kim

IPC: G02F1/1362 ,  H01L27/12 ,  G02F1/1365 ,  G02F1/1368 ,  G02F1/1343

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

公开(公告)号：US09825065B2

公开(公告)日：2017-11-21

申请号：US15342756

申请日：2016-11-03

Applicant: Samsung Display Co., Ltd.

Inventor： Young-Wook Lee ,  Woo-Geun Lee ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Ji-Soo Oh

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/768

CPC classification number: H01L27/124 ,  H01L21/76834 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/7869 ,  H01L29/78693

Abstract: A substrate including gate wirings including gate line and a gate electrode disposed on the substrate, a storage line disposed on the same layer as the gate wirings, a gate insulating layer disposed on the gate wirings and the storage line, an oxide semiconductor layer pattern disposed on the gate insulating layer, data wirings including a data line crossing the gate line, a source electrode disposed on one side of the oxide semiconductor layer pattern, and a drain electrode disposed on another side of the oxide semiconductor layer, and an etch stopper including a first etch stopper portion disposed between the storage line and the data line and partially overlapping both the data line and the storage line.

公开(公告)号：US09715133B2

公开(公告)日：2017-07-25

申请号：US14512354

申请日：2014-10-10

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Young-Wook Lee ,  Hwa-Yeul Oh ,  Pil-Sang Yun ,  Je-Hyeong Park

IPC: G09G3/36 ,  G02F1/133 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: G02F1/13306 ,  G02F1/136213 ,  G02F1/13624 ,  G02F2001/134345 ,  G09G3/3659 ,  G09G2300/0443 ,  G09G2300/0447 ,  G09G2300/0809 ,  G09G2300/0876 ,  G09G2320/028

Abstract: The present invention relates to a liquid crystal display and a driving method thereof. The liquid crystal display of the present invention includes a pixel electrode including: a first subpixel electrode, a second subpixel electrode, and a third subpixel electrode electrically separated from each other; a first thin film transistor connected to the first subpixel electrode; a second thin film transistor connected to the second subpixel electrode; a third thin film transistor connected to the third subpixel electrode; a fourth thin film transistor connected to the second subpixel electrode and the third subpixel electrode; a first gate line connected to the first to third thin film transistors; a second gate line connected to the fourth thin film transistor; a data line connected to the first and second thin film transistors; and a storage electrode line connected to the third thin film transistor.

公开(公告)号：US09111805B2

公开(公告)日：2015-08-18

申请号：US14230787

申请日：2014-03-31

Applicant: Samsung Display Co., Ltd.

Inventor： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

Abstract translation: 薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的 在蚀刻停止器上。

公开(公告)号：US09105733B2

公开(公告)日：2015-08-11

申请号：US13897879

申请日：2013-05-20

Applicant: Samsung Display Co., Ltd.

Inventor： Young-Wook Lee ,  Woo-Geun Lee ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Ji-Soo Oh

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L27/124 ,  H01L21/76834 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/7869 ,  H01L29/78693

Abstract: A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.

Abstract translation: 提供薄膜晶体管（TFT）阵列基板及其制造方法。 TFT阵列基板可以包括设置在基板上的栅极线，包括栅极线和栅电极，设置在栅电极上的氧化物半导体层图案，设置在氧化物半导体层图案上的数据线，并且包括源电极和 薄膜晶体管（TFT）的漏电极和栅极电极以及沿着与栅极线相交的方向延伸的数据线，以及设置在源极/漏极之间形成TFT的区域的蚀刻停止图案，以及 氧化物半导体层图案和栅极线与数据线在栅极线与数据线之间重叠的区域。

公开(公告)号：US20140374764A1

公开(公告)日：2014-12-25

申请号：US14480751

申请日：2014-09-09

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Young-Wook Lee ,  Jang-Soo Kim

IPC: H01L27/12 ,  G02F1/1365

CPC classification number: H01L27/124 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1365 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136222 ,  G02F2001/13629 ,  H01L27/1248

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film. transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Abstract translation: 薄膜晶体管阵列面板包括基板; 形成在所述基板上的多条栅极线; 与栅极线相交的多条数据线; 连接到栅极线和数据线的多个薄膜晶体管; 形成在栅极线，数据线和薄膜的上部的多个滤色器。 晶体管 形成在滤色器上并且包括透明导体的公共电极; 钝化层，其形成在所述公共电极的上部; 以及形成在钝化层的上部并且连接到每个薄膜晶体管的漏电极的多个像素电极。