Abstract:
A magnetic memory including a plurality of magnetic junctions and at least one spin-orbit interaction (SO) active layer is described. Each of the magnetic junctions includes a pinned layer, a free layer and a nonmagnetic spacer layer between reference and free layers. The free layer has at least one of a tilted easy axis and a high damping constant. The tilted easy axis is at a nonzero acute angle from a direction perpendicular-to-plane. The high damping constant is at least 0.02. The at least one SO active layer is adjacent to the free layer and carries a current in-plane. The at least one SO active layer exerts a SO torque on the free layer due to the current. The free layer is switchable using the SO torque.
Abstract:
A magnetic device and method for providing the magnetic device are described. The magnetic device includes magnetic junctions and spin-orbit interaction (SO) active layer(s). The magnetic junction includes free and pinned layers separated by a nonmagnetic spacer layer. The free layer has a free layer perpendicular magnetic anisotropy (PMA) energy greater than a free layer out-of-plane demagnetization energy. The free layer also includes a diluted magnetic layer that has a PMA greater than its out-of-plane demagnetization energy. The diluted magnetic layer includes magnetic material(s) and nonmagnetic material(s) and has an exchange stiffness that is at least eighty percent of an exchange stiffness for the magnetic material(s). The SO active layer(s) are adjacent to the free layer. The SO active layer(s) carry a current in-plane and exert a SO torque on the free layer due to the current. The free layer is switchable between stable magnetic states using the SO torque.
Abstract:
A magnetic junction and method for providing the magnetic junction are described. The magnetic junction includes a reference layer, a nonmagnetic spacer layer and a hybrid free layer. The hybrid free layer is switchable between stable magnetic states using a current passed through the magnetic junction. The nonmagnetic spacer layer is between the free layer and the reference layer. The hybrid free layer includes a soft magnetic layer, a hard magnetic layer and an oxide coupling layer between the hard magnetic layer and the soft magnetic layer. The soft magnetic layer has a soft layer magnetic thermal stability coefficient of not more than thirty. The hard magnetic layer has a hard layer magnetic thermal stability coefficient of at least twice the soft layer magnetic thermal stability coefficient.
Abstract:
A magnetic junction usable in a magnetic device and a method for providing the magnetic junction are described. A first portion of a magnetoresistive stack corresponding to the magnetic junction is provided. Providing this portion of the magnetoresistive stack includes providing at least one layer for a free layer of the magnetic junction. A second portion of the magnetoresistive stack is provided after the step of providing the first portion of the magnetoresistive stack. The magnetoresistive stack is patterned to provide the magnetic junction after the step of providing the second portion of the magnetoresistive stack. An ambient temperature for the magnetoresistive stack and the magnetic junction does not exceed a crystallization temperature of the free layer after the step of providing the free layer through the step of patterning the magnetoresistive stack. The magnetic junction is annealed at an anneal temperature not less than the crystallization temperature after the step of patterning the magnetoresistive stack.
Abstract:
A magnetic junction and method for providing the magnetic junction are described. The magnetic junction includes a free layer, first and second reference layers, and first and second nonmagnetic spacer layers. The free layer is switchable between stable magnetic states using a current passed through the magnetic junction. The first and second nonmagnetic spacer layers are between the free layer and first and second reference layers. The first and second reference layers have first and second reference layer magnetic lengths. The free layer has a free layer magnetic length less than the first and second reference layer magnetic lengths. The free layer magnetic length has a first end and a second end opposite to the first end. The free layer and the reference layers are oriented such that the first and second reference layer magnetic lengths extend past the first and second ends of the free layer.
Abstract:
A spin-torque oscillator includes: a driving reference layer having a fixed magnetization; a nonmagnetic spacer layer; and a free layer having a changeable magnetization exhibiting an easy-cone magnetic anisotropy, the nonmagnetic spacer layer being between the driving reference layer and the free layer, a magnetic anisotropy energy of the free layer having a local maximum along an axis, a local minimum at an angle from the axis, and a global maximum different from the local maximum, the angle being greater than zero degrees, wherein the spin-torque oscillator is configured such that the changeable magnetization of the free layer precesses around the axis.
Abstract:
A magnetic junction usable in a magnetic device and a method for providing the magnetic junction are described. The magnetic junction includes a free layer, a reference layer and nonmagnetic spacer layer between the free and reference layers. At least one of the free and reference layers includes at least one Heusler multilayer. Each of the at least one Heusler multilayer includes a plurality of Heusler adjoining layers that at least one interface. The Heusler layers include a plurality of Heusler alloys, have a plurality of lattice parameters and have a plurality of coefficients of thermal expansion. The magnetic junction is configured such that the free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction.
Abstract:
A magnetic junction usable in a magnetic device and a method for providing the magnetic junction are described. The magnetic junction includes a free layer, a reference layer and nonmagnetic spacer layer between the free and reference layers. At least one of the free and reference layers includes at least one Heusler multilayer. Each of the at least one Heusler multilayer includes a plurality of Heusler adjoining layers that at least one interface. The Heusler layers include a plurality of Heusler alloys, have a plurality of lattice parameters and have a plurality of coefficients of thermal expansion. The magnetic junction is configured such that the free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction.
Abstract:
A magnetic device usable in electronic devices is described. The magnetic device includes a magnetic junction and at least one smart thermal barrier that is thermally coupled with the magnetic junction. The magnetic junction includes at least one reference layer, at least one nonmagnetic spacer layer and a free layer. The nonmagnetic spacer layer(s) are between the reference layer(s) and the free layer. The free layer is switchable between stable magnetic states when a write current passed through the magnetic junction. The smart thermal barrier has a low heat conductance below a transition temperature range, and a high heat conductance above the transition temperature range.
Abstract:
A magnetic memory includes memory array tiles (MATs), intermediate circuitry, global bit lines and global circuitry. Each MAT includes bit lines, word lines, and magnetic storage cells having magnetic junction(s), selection device(s) and at least part of a spin-orbit interaction (SO) active layer adjacent to the magnetic junction(s). The SO active layer exerts a SO torque on the magnetic junction(s) due to a preconditioning current passing through the SO active layer. The magnetic junction(s) are programmable using write current(s) driven through the magnetic junction(s) and the preconditioning current. The bit and word lines correspond to the magnetic storage cells. The intermediate circuitry controls read and write operations within the MATs. Each global bit line corresponds to a portion of the MATs. The global circuitry selects and drivesportions of the global bit lines for read operations and write operations.