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公开(公告)号：US10482833B2
公开(公告)日：2019-11-19
申请号：US15805589
申请日：2017-11-07
发明人： Yuki Okamoto
摘要： An operation method of a display device with high visibility is to be provided. The display device is an electronic device including a first display element, a second display element, an optical sensor, and a gain calculation circuit. In the electronic device, the illuminance of external light is obtained with the optical sensor, and depending on the illuminance, images displayed using the first display element and the second display element are corrected. The gain calculation circuit obtains the illuminance and calculates a gain value depending on the illuminance. In particular, the gain value is calculated for each of the first display element and the second display element. Furthermore, the gain calculation circuit performs dimming and toning on image data displayed using the first display element and the second display element by multiplying the image data by the gain values or values corresponding to the gain values.
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公开(公告)号：US10380956B2
公开(公告)日：2019-08-13
申请号：US15627497
申请日：2017-06-20
发明人： Yuki Okamoto
IPC分类号： H01L29/78 , H01L27/12 , G09G3/36 , G09G3/3233 , H01L27/32 , H01L29/786
摘要： An information terminal capable of switching display and non-display of images by strain. The information terminal includes a display portion and a strain sensor. The display portion includes a liquid crystal element, a light-emitting element, and a first and a second transistors. The strain sensor includes a strain sensor element and a resistor. The first transistor has a function of controlling current flowing into the light-emitting element. The strain sensor element has a function as a variable resistor. A first terminal of the strain sensor element is electrically connected to a first terminal of the resistor. A gate of the first transistor is electrically connected to a first terminal of the strain sensor element via the second transistor.
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公开(公告)号：US10305460B2
公开(公告)日：2019-05-28
申请号：US15432002
申请日：2017-02-14
发明人： Yuki Okamoto , Yoshiyuki Kurokawa
IPC分类号： H03K5/22 , H03K5/24 , G11C11/401 , G11C15/04 , H03M1/66
摘要： A semiconductor device that enables a memory size reduction is provided. The semiconductor device includes a converter circuit, a memory circuit, and a detection circuit. The converter circuit has a function of converting first data that includes a digital voltage value to second data that includes an analog current value. The memory circuit has a function of storing third data that includes an analog current value. The detection circuit has a function of generating data that indicates whether the analog current values of the second and third data match.
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公开(公告)号：US20180233089A1
公开(公告)日：2018-08-16
申请号：US15885078
申请日：2018-01-31
发明人： Yuki Okamoto
IPC分类号： G09G3/3258 , G09G3/3233 , G09G3/36 , G09G3/20 , G06F3/041 , H01L27/32 , G02F1/1362 , G02F1/1335 , G02F1/1343 , G02F1/1368 , H01L21/02
CPC分类号： G09G3/3258 , G02F1/133553 , G02F1/13439 , G02F1/136286 , G02F1/1368 , G06F3/0412 , G06F3/0414 , G09G3/2003 , G09G3/2092 , G09G3/3225 , G09G3/3233 , G09G3/3648 , G09G2300/023 , G09G2300/0426 , G09G2300/0452 , G09G2300/046 , G09G2310/08 , G09G2320/0673 , G09G2330/021 , H01L21/02164 , H01L21/02266 , H01L27/1225 , H01L27/3232 , H01L29/78648 , H01L29/7869 , H01L29/78696
摘要： A display system includes a host device, a display controller, and a display panel. The display panel includes a pixel array including a plurality of subpixels each including a light-emitting display element and a reflective display element. The host device sends image data DT0 to the display controller. The display controller has the following functions: color classification of the image data DT0; generation of attribute data based on the classification result; generation of image data DT1 from the image data DT0; generation of two kinds of image data DT2_e and DT2_r through image processing of the image data DT1 in accordance with the attribute data; generation of image data DT3_e from the image data DT2_e; and generation of image data DT3_r from the image data DT2_r. The image data DT3_e is displayed by the light-emitting display element, and the image data DT3_r is displayed by the reflective display element.
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公开(公告)号：US09876499B2
公开(公告)日：2018-01-23
申请号：US15279594
申请日：2016-09-29
IPC分类号： H03K19/177 , H03K19/00 , H03K19/0948
CPC分类号： H03K19/0013 , H03K19/0948 , H03K19/17728 , H03K19/1776
摘要： A semiconductor device suitable for low-voltage driving. The semiconductor device includes a first transistor, a second transistor, a power supply line, a circuit, and a memory circuit. The first transistor controls electrical continuity between the circuit and the power supply line. The memory circuit stores data for setting a gate potential of the first transistor. The second transistor controls electrical continuity between an output node of the memory circuit and a gate of the first transistor. The second transistor is a transistor with an ultralow off-state current, for example, an oxide semiconductor transistor. In a period for operating the circuit, a first potential is input to the power supply line and the second transistor is turned off. In a period for updating the gate potential of the first transistor, a second potential is input to the power supply line. The second potential is higher than the first potential.
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公开(公告)号：US09793905B2
公开(公告)日：2017-10-17
申请号：US14925161
申请日：2015-10-28
发明人： Yuki Okamoto , Yoshiyuki Kurokawa
IPC分类号： H03L7/099 , H03K3/03 , H01L27/1156
CPC分类号： H03L7/099 , H01L27/1156 , H03K3/0315
摘要： An object of the present invention is to provide a semiconductor device including an oscillator circuit including a circuit between inverters. In the circuit, a sum of the length (a1) of a wiring path between a terminal A and a terminal C1 and a length (b1) of a wiring path between a terminal D1 and a terminal B is substantially equal to a sum of the length (a2) of a wiring path between the terminal A and a terminal C2 and the length (b2) of a wiring path between a terminal D2 and the terminal B.
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公开(公告)号：US09576994B2
公开(公告)日：2017-02-21
申请号：US14837040
申请日：2015-08-27
发明人： Hiroki Inoue , Yoshiyuki Kurokawa , Takayuki Ikeda , Yuki Okamoto
IPC分类号： H01L27/146 , H01L29/786 , H01L29/10
CPC分类号： H01L27/14612 , H01L27/14632 , H01L27/14643 , H01L29/7869
摘要： An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a first circuit and a second circuit. The first circuit includes a photoelectric conversion element, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first capacitor, a second capacitor, and a third capacitor. The second circuit includes an eighth transistor. Variation in threshold voltage of an amplifier transistor (the fifth transistor) included in the first circuit can be compensated.
摘要翻译： 提供能够获得高质量成像数据的成像装置。 成像装置包括第一电路和第二电路。 第一电路包括光电转换元件，第一晶体管，第二晶体管，第三晶体管，第四晶体管，第五晶体管，第六晶体管，第七晶体管，第一电容器，第二电容器和第三电容器。 第二电路包括第八晶体管。 可以补偿包括在第一电路中的放大器晶体管（第五晶体管）的阈值电压的变化。
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公开(公告)号：US09461646B2
公开(公告)日：2016-10-04
申请号：US15007350
申请日：2016-01-27
IPC分类号： H03K19/177 , H03K19/00 , H03K19/0948
CPC分类号： H03K19/0013 , H03K19/0948 , H03K19/17728 , H03K19/1776
摘要： A semiconductor device suitable for low-voltage driving. The semiconductor device includes a first transistor, a second transistor, a power supply line, a circuit, and a memory circuit. The first transistor controls electrical continuity between the circuit and the power supply line. The memory circuit stores data for setting a gate potential of the first transistor. The second transistor controls electrical continuity between an output node of the memory circuit and a gate of the first transistor. The second transistor is a transistor with an ultralow off-state current, for example, an oxide semiconductor transistor. In a period for operating the circuit, a first potential is input to the power supply line and the second transistor is turned off. In a period for updating the gate potential of the first transistor, a second potential is input to the power supply line. The second potential is higher than the first potential.
摘要翻译： 适用于低压驱动的半导体器件。 半导体器件包括第一晶体管，第二晶体管，电源线，电路和存储器电路。 第一个晶体管控制电路和电源线之间的电气连续性。 存储电路存储用于设置第一晶体管的栅极电位的数据。 第二晶体管控制存储电路的输出节点和第一晶体管的栅极之间的电连续性。 第二晶体管是具有超低截止电流的晶体管，例如氧化物半导体晶体管。 在用于操作电路的时段中，第一电位被输入到电源线并且第二晶体管被截止。 在用于更新第一晶体管的栅极电位的时段中，第二电位被输入到电源线。 第二个潜力高于第一个潜力。
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公开(公告)号：US12086954B2
公开(公告)日：2024-09-10
申请号：US17768726
申请日：2020-10-19
发明人： Yuki Okamoto , Tatsuya Onuki
IPC分类号： G06T3/40 , G02F1/1362 , G02F1/1368 , G06T1/20 , G06T3/4046 , G09G3/36 , G09G3/32
CPC分类号： G06T3/4046 , G02F1/136286 , G02F1/1368 , G06T1/20 , G09G3/3688 , G09G3/32 , G09G2300/023 , G09G2340/0407
摘要： A display apparatus that can display a high-resolution image can be provided. In the display apparatus, a first layer and a second layer are stacked. In the first layer, an arithmetic circuit and a data driver circuit and are provided, and in the second layer, a display portion is provided. In the arithmetic circuit, a neural network is configured. The display portion has a region overlapping with the data driver circuit. The arithmetic circuit has a function of performing arithmetic processing using the neural network on image data and supplying the arithmetically-processed image data to the data driver circuit.
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公开(公告)号：US12074179B2
公开(公告)日：2024-08-27
申请号：US17781152
申请日：2020-12-14
发明人： Seiichi Yoneda , Toshiki Hamada , Yuki Okamoto , Shunpei Yamazaki
IPC分类号： H01L27/146 , H04N25/75 , H04N25/77
CPC分类号： H01L27/14612 , H01L27/14636 , H04N25/75 , H04N25/77
摘要： An imaging device with an arithmetic function in which the circuit size is reduced is provided. The imaging device includes a plurality of pixel blocks. Each of the pixel blocks includes N (N is an integer greater than or equal to 1) first circuits, N second circuits, and a third circuit. Each of the first circuits includes a photoelectric conversion device, and the photoelectric conversion device has a function of converting incident light into an electrical signal and has a function of outputting a first signal that is obtained by binarizing the electrical signal to the second circuit. Each of the second circuits has a function of outputting a second signal that is obtained by multiplying the first signal by a weight coefficient to a third circuit. When the N second signals are output to a wiring electrically connected to the third circuit, addition is performed. The first circuit includes a transistor, and an OS transistor is preferably used as the transistor.
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