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    Semiconductor device and method for driving semiconductor device
    1.
    发明授权
    Semiconductor device and method for driving semiconductor device 有权

    公开(公告)号：US12223904B2

    公开(公告)日：2025-02-11

    申请号：US18569779

    申请日：2022-06-23

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yuki Okamoto ,  Tatsuya Onuki ,  Hidetomo Kobayashi ,  Munehiro Kozuma ,  Takanori Matsuzaki ,  Susumu Kawashima ,  Yutaka Okazaki

    IPC: G09G3/3233 ,  H01L27/088 ,  H01L27/12

    Abstract: The invention of the application is the invention regarding a semiconductor device and a method for driving the semiconductor device. The semiconductor device includes first and second transistors, first to fifth switches, first to third capacitors, and a display element. The first transistor (M2) comprises a back gate, a gate of the first transistor is electrically connected to the first switch (M1), the second switch (M3) and the first capacitor (C1) are positioned between the gate of the first transistor and a source of the first transistor, the back gate of the first transistor is electrically connected to the third switch (M4), the second capacitor (C2) is positioned between the back gate of the first transistor and the source of the first transistor, the source of the first transistor is electrically connected to the fourth switch (M6) and a drain of the second transistor (M5), a gate of the second transistor is electrically connected to the fifth switch (M7), the third capacitor (C3) is positioned between the gate of the second transistor and a source of the second transistor, and the source of the second transistor is electrically connected to the display element (61).

    Semiconductor device and electronic device
    2.
    发明授权
    Semiconductor device and electronic device 有权

    公开(公告)号：US12120443B2

    公开(公告)日：2024-10-15

    申请号：US17793104

    申请日：2021-01-08

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yoshiyuki Kurokawa ,  Munehiro Kozuma ,  Takeshi Aoki ,  Takuro Kanemura

    IPC: H04N25/74 ,  H01L27/12 ,  H01L29/786 ,  H10B12/00 ,  H10K39/32

    CPC classification number: H04N25/74 ,  H10K39/32 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/78648 ,  H01L29/7869 ,  H10B12/00

    Abstract: A semiconductor device that has low power consumption and is capable of performing a product-sum operation is provided. The semiconductor device includes first and second cells, a first circuit, and first to third wirings. Each of the first and second cells includes a capacitor, and a first terminal of each of the capacitors is electrically connected to the third wiring. Each of the first and second cells has a function of feeding a current based on a potential held at a second terminal of the capacitor, to a corresponding one of the first and second wirings. The first circuit is electrically connected to the first and second wirings and stores currents I1 and I2 flowing through the first and second wirings. When the potential of the third wiring changes and accordingly the amount of current of the first wiring changes from I1 to I3 and the amount of current of the second wiring changes from I2 to I4, the first circuit generates a current with an amount I1−I2−I3+I4. Note that the potential of the third wiring is changed by firstly inputting a reference potential to the third wiring and then inputting a potential based on internal data or a potential based on information obtained by a sensor.

    Battery protection circuit, power storage device, and electric device
    3.
    发明授权
    Battery protection circuit, power storage device, and electric device 有权

    公开(公告)号：US11923707B2

    公开(公告)日：2024-03-05

    申请号：US17293215

    申请日：2019-11-06

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Takayuki Ikeda ,  Munehiro Kozuma ,  Takanori Matsuzaki ,  Akio Suzuki ,  Seiya Saito

    IPC: H02J7/00

    CPC classification number: H02J7/0029 ,  H02J7/00712

    Abstract: A battery protection circuit with a novel configuration and a power storage device including the battery protection circuit are provided. The battery protection circuit includes a switch circuit for controlling charge and discharge of a battery cell; the switch circuit includes a mechanical relay, a first transistor, and a second transistor; the switch circuit has a function of controlling electrical connection between a first terminal and a second terminal; the mechanical relay has a function of breaking electrical connection between the first terminal and the second terminal; the first transistor has a function of supplying first current between the first terminal and the second terminal; the second transistor has a function of supplying second current between the first terminal and the second terminal; and the first current is higher than the second current.

    Semiconductor device, display system, and electronic device
    5.
    发明授权
    Semiconductor device, display system, and electronic device 有权

    公开(公告)号：US10686080B2

    公开(公告)日：2020-06-16

    申请号：US16375135

    申请日：2019-04-04

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Takashi Nakagawa ,  Yoshiyuki Kurokawa ,  Munehiro Kozuma

    IPC: H01L29/786 ,  H01L27/12 ,  H01L27/28 ,  H01L29/16 ,  H01L29/24 ,  H03K19/00 ,  H03K19/17704 ,  H03K19/17736

    Abstract: A novel semiconductor device is provided. The semiconductor device includes a programmable logic device including a programmable logic element, a control circuit, and a detection circuit. The programmable logic device includes a plurality of contexts. The control circuit is configured to control selection of the contexts. The detection circuit is configured to output a signal corresponding to the amount of radiation. The control circuit is configured to switch between a first mode and a second mode in accordance with the signal corresponding to the amount of radiation. The first mode is a mode in which the programmable logic device performs processing by a multi-context method, and the second mode is a mode in which the programmable logic device performs processing using a majority signal of signals output from the logic element multiplexed by the plurality of contexts.

    Level shifter circuit
    9.
    发明授权
    Level shifter circuit 有权
    电平移位电路

    公开(公告)号：US09590594B2

    公开(公告)日：2017-03-07

    申请号：US14638331

    申请日：2015-03-04

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Munehiro Kozuma

    IPC: H03L5/00 ,  H03K3/012 ,  H03K3/356

    CPC classification number: H03K3/012 ,  H03K3/356017

    Abstract: Leakage current in a standby mode of a level shifter capable of operating with low voltage is reduced. Provided is a level shifter circuit in which an n-channel silicon transistor and an oxide semiconductor transistor are provide in series between an output signal line and a low potential power supply line. The potential of a gate electrode of the oxide semiconductor transistor is raised to a potential higher than input signal voltage by capacitive coupling, so that on-state current of the oxide semiconductor transistor is increased.

    Abstract translation: 降低了能够以低电压工作的电平移位器的待机模式下的泄漏电流。 提供了一种电平移位器电路，其中n沟道硅晶体管和氧化物半导体晶体管串联在输出信号线和低电位电源线之间。 氧化物半导体晶体管的栅电极的电位通过电容耦合升高到高于输入信号电压的电位，使得氧化物半导体晶体管的导通电流增加。

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