公开(公告)号：US12003229B2

公开(公告)日：2024-06-04

申请号：US17348521

申请日：2021-06-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Cetin Kaya ,  Nathan Richard Schemm ,  Yong Xie

IPC: H02H7/00 ,  G01K7/02 ,  G01R1/20 ,  G01R19/165 ,  G05F1/46 ,  H03K5/24 ,  H03K17/082

CPC classification number: H03K17/0822 ,  G01K7/02 ,  G01R1/203 ,  G01R19/16538 ,  G05F1/461 ,  H03K5/24

Abstract: A short circuit detection circuit includes a current terminal, a sense resistor, an amplifier, and a resistor-capacitor ladder. The sense resistor is coupled to the current terminal, and is configured to develop a sense voltage proportional to a current through the current terminal. The amplifier is coupled to the sense resistor, and is configured to generate a scaled current proportional to the sense voltage. The resistor-capacitor ladder is coupled to the amplifier, and is configured to generate a measurement voltage that represents a surface temperature rise due to the current through the current terminal.

公开(公告)号：US20230349774A1

公开(公告)日：2023-11-02

申请号：US18206684

申请日：2023-06-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Nathan Richard Schemm

IPC: G01K15/00 ,  G01K7/16 ,  G05B11/01

CPC classification number: G01K15/005 ,  G01K7/16 ,  G01K15/007 ,  G05B11/018 ,  H01L23/34

Abstract: Methods, apparatus, systems and articles of manufacture to trim temperature sensors are disclosed. An example method includes: sampling a first value indicative of a temperature of a first die of a multi-chip module (MCM) with a first temperature sensor, the first die including a first transistor having a channel including a first material; and calibrating a second temperature sensor configured to sample a second value indicative of a temperature of a second die including a second transistor have a second channel including a second material, the calibrating based on the first value.

公开(公告)号：US11621551B2

公开(公告)日：2023-04-04

申请号：US17505757

申请日：2021-10-20

Applicant: Texas Instruments Incorporated

Inventor： Serkan Dusmez ,  Nathan Richard Schemm ,  Salil Chellappan

IPC: H02H5/00 ,  H02H5/04 ,  H02H1/00 ,  H02H7/12

Abstract: Methods, systems, and apparatus to facilitate a fault triggered diode emulation mode of a transistor. An example apparatus includes a driver to output a control signal to a gate terminal of a transistor of a power converter; and a diode emulation control circuit to, in response to determining a fault corresponding to the transistor, enable the transistor when current flows in a direction from a source terminal of the transistor to a drain terminal of the transistor.

公开(公告)号：US11171616B2

公开(公告)日：2021-11-09

申请号：US16259100

申请日：2019-01-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Aritra Banerjee ,  Rahmi Hezar ,  Lei Ding ,  Nathan Richard Schemm

IPC: H03F3/19 ,  H03F3/193 ,  H03F1/02 ,  H03F1/22 ,  H03F3/21 ,  H03F3/24 ,  H03F3/72

Abstract: A first branch group circuit includes a first branch circuit receiving a first RF input signal and first control information; and a second branch circuit receiving the first input signal and second control information. Each of the first and second branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit remains on. A second branch group circuit includes: a third branch circuit receiving a second RF input signal and third control information; and a fourth branch circuit receiving the second input signal and fourth control information. Each of the third and fourth branch circuits includes a power amplifier. The fourth control information enables the fourth branch circuit to be switched on or off while the third branch circuit remains on. A combiner combines output signals of the power amplifiers to produce an output signal.

公开(公告)号：US20170288672A1

公开(公告)日：2017-10-05

申请号：US15463404

申请日：2017-03-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Nathan Richard Schemm

IPC: H03K19/0185

CPC classification number: H03K19/018507

Abstract: A level shifter includes a signal generator that generates differential signals on a first output and a second output. A first capacitor is coupled between the first output and a first node and a second capacitor is coupled between the second output and a second node. A third capacitor is coupled between the first node and a first voltage potential, wherein the capacitance of the third capacitor is variable. A fourth capacitor is coupled between the second node and the first voltage potential, wherein the capacitance of the fourth capacitor is variable.

公开(公告)号：US09385669B2

公开(公告)日：2016-07-05

申请号：US14312239

申请日：2014-06-23

Applicant: Texas Instruments Incorporated

Inventor： Aritra Banerjee ,  Joonhoi Hur ,  Baher Haroun ,  Nathan Richard Schemm ,  Rahmi Hezar ,  Lei Ding

IPC: H03F3/217 ,  H03F3/21 ,  H03F3/193 ,  H03F1/02 ,  H03F3/45

CPC classification number: H03F1/0205 ,  H03F1/0294 ,  H03F3/193 ,  H03F3/211 ,  H03F3/217 ,  H03F3/2171 ,  H03F3/2173 ,  H03F3/2176 ,  H03F3/45179 ,  H03F2200/391 ,  H03F2200/451 ,  H03F2203/21139 ,  H03F2203/21142

Abstract: An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.

Abstract translation: 外相放大器包括具有耦合到第一导体（31-1）的输出的第一E类功率放大器（16-1）和接收第一RF驱动信号（S1（t））的输入。 第一电抗元件（CA-1）耦合在第一导体和第二导体（30-1）之间。 第二电抗元件（LA-1）耦合在第二导体和第三导体（32-1）之间。 第二类E功率放大器（17-1）包括耦合到第四导体（31-2）的输出和耦合到第二RF驱动信号（S2（t））的输入，第三反应元件（CA-3 ）耦合在第二和第四导体之间。 第一和第二功率放大器的输出由第一，第二和第三无功元件组合以在负载（R）中产生输出电流。 效率增强电路（LEEC-1）耦合在第一和第四导体之间，以提高退避功率电平的功率效率。 功率增强电路（20-1,2）分别耦合到第一和第四导体。