公开(公告)号：US11782148B2

公开(公告)日：2023-10-10

申请号：US16363719

申请日：2019-03-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Karthik Subburaj ,  Sandeep Rao ,  Sriram Murali ,  Karthik Ramasubramanian

IPC: G01S13/58 ,  G01S7/35 ,  G01S13/34

CPC classification number: G01S13/584 ,  G01S7/352 ,  G01S7/356 ,  G01S13/343 ,  G01S13/345

Abstract: Aspects of the present disclosure provide for a radar system including a radar IC including a timing engine, a local oscillator, and a modulator. The timing engine is configured to generate one or more chirp control signals. The local oscillator is configured to receive the one or more chirp control signals and generate a frame including a first sequence of chirps according to the one or more chirp control signals. The modulator is configured to modulate the first sequence of chirps to generate a second sequence of chirps so the frame includes the first sequence of chirps and the second sequence of chirps offset by a first frequency value.

公开(公告)号：US11581873B2

公开(公告)日：2023-02-14

申请号：US17463317

申请日：2021-08-31

Applicant: Texas Instruments Incorporated

Inventor： Jaiganesh Balakrishnan ,  Sriram Murali ,  Kalyan Gudipati ,  Venkateshwara Reddy Pothapu ,  Sarma Sundareswara Gunturi

IPC: H03H11/00 ,  H03H11/04 ,  H03H17/00

Abstract: Dual mode filters having two reconfigurable multi-stage filters. In a dual band mode, each reconfigurable filter filters an input signal in a different band using every filter stage. In a single band mode, both reconfigurable filters are effectively divided into two sub-chains that include either the odd-numbered filter stages or the even-numbered filter stages. Together, the four sub-chains in the single band mode filter an input signal in a single band with a higher parallelization than each reconfigurable filter in the dual band mode. In some embodiments, the dual mode filter is a decimation filter. In other embodiments, the dual mode filter is a resampling filter. In still other embodiments, the dual mode filter is an interpolation filter.

公开(公告)号：US11171681B2

公开(公告)日：2021-11-09

申请号：US17072104

申请日：2020-10-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sriram Murali ,  Jaiganesh Balakrishnan ,  Pooja Sundar ,  Harshavardhan Adepu ,  Wenjing Lu ,  Yeswanth Guntupalli

IPC: H04B1/40 ,  H04B1/00

Abstract: A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.

公开(公告)号：US20210083695A1

公开(公告)日：2021-03-18

申请号：US17022871

申请日：2020-09-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jaiganesh Balakrishnan ,  Sriram Murali ,  Sundarrajan Rangachari ,  Yeswanth Guntupalli

IPC: H04B1/00

Abstract: A radio-frequency (RF) sampling transmitter (e.g., of the type that may be used in 5G wireless base stations) includes a complex baseband digital-to-analog converter (DAC) response compensator that operates on a complex baseband signal at a sampling rate lower than the sampling rate of an RF sampling DAC in the RF sampling transmitter. The DAC response compensator flattens the sample-and-hold response of the RF sampling DAC only in the passband of interest, addressing the problem of a sinc response introduced by the sample-and-hold operation of the RF sampling DAC and avoiding the architectural complexity and high power consumption of an inverse sinc filter that operates on the signal at a point in the signal chain after it has already been up-converted to an RF passband.

公开(公告)号：US10816655B2

公开(公告)日：2020-10-27

申请号：US15638106

申请日：2017-06-29

Applicant: Texas Instruments Incorporated

Inventor： Sachin Bharadwaj ,  Karthik Subburaj ,  Sriram Murali

IPC: G01S13/44 ,  G06K9/52 ,  G01S7/40 ,  G01S13/90 ,  G06K9/32 ,  G01S13/30 ,  G01S7/35 ,  G01S13/02 ,  G01S7/41 ,  G01S13/00

Abstract: A radar system is provided that includes transmission signal generation circuitry, a transmit channel coupled to the transmission generation circuitry to receive a continuous wave test signal, the transmit channel configurable to output a test signal based on the continuous wave signal in which a phase angle of the test signal is changed in discrete steps within a phase angle range, a receive channel coupled to the transmit channel via a feedback loop to receive the test signal, the receive channel including an in-phase (I) channel and a quadrature (Q) channel, a statistics collection module configured to collect energy measurements of the test signal output by the I channel and the test signal output by the Q channel at each phase angle, and a processor configured to estimate phase and gain imbalance of the I channel and the Q channel based on the collected energy measurements.

公开(公告)号：US20170212214A1

公开(公告)日：2017-07-27

申请号：US15004443

申请日：2016-01-22

Applicant: Texas Instruments Incorporated

Inventor： Sriram Murali ,  Karthik Subburaj ,  Karthik Ramasubramanian

IPC: G01S7/35

CPC classification number: G01S7/352 ,  G01S7/4021 ,  G01S13/931 ,  G01S2007/358 ,  G01S2007/406

Abstract: A radar system is provided that includes a receive channel configured to receive a reflected signal and to generate a first digital intermediate frequency (IF) signal based on the reflected signal, a reference receive channel configured to receive a reflected signal and to generate a second digital IF signal based on the reflected signal, and digital mismatch compensation circuitry coupled to receive the first digital IF signal and the second digital IF signal, the digital mismatch compensation circuitry configured to process the first digital IF signal and the second digital IF signal to compensate for mismatches between the receive channel and the reference receive channel.

公开(公告)号：US09491012B1

公开(公告)日：2016-11-08

申请号：US14745349

申请日：2015-06-19

Applicant: Texas Instruments Incorporated

Inventor： Jaiganesh Balakrishnan ,  Sriram Murali ,  Sundarrajan Rangachari ,  Sarma Sundareswara Gunturi

IPC: H04L25/03 ,  H04B1/04

CPC classification number: H04L25/03859 ,  H03F1/3241 ,  H04B1/04 ,  H04B1/0475 ,  H04B2001/0425

Abstract: Example embodiments of systems and methods of direct oversampled low PAR pulse shaping encapsulating DSSS spreading are disclosed herein. Pulse-shaping of a DSSS spread data symbol stream results in a small number of waveform patterns to choose from for any data-symbol window. Low complexity programmable look-up table (LUT) based direct pulse shaping may be implemented, while only needing to compute a negation function. The chosen pulse shape may generate a low PAR for the baseband signal, allowing for a reduction in the saturation power of the power amplifier, thereby reducing the overall transmitter power consumption.

Abstract translation: 本文公开了封装DSSS扩展的直接过采样低PAR脉冲整形的系统和方法的示例实施例。 DSSS扩展数据符号流的脉冲整形导致少量波形图案，可供任何数据符号窗口选择。 可以实现基于直接脉冲整形的低复杂度可编程查找表（LUT），而仅需要计算否定函数。 所选择的脉冲形状可以产生用于基带信号的低PAR，允许降低功率放大器的饱和功率，从而降低总的发射机功率消耗。

公开(公告)号：US20250047531A1

公开(公告)日：2025-02-06

申请号：US18651130

申请日：2024-04-30

Applicant: Texas Instruments Incorporated

Inventor： Jaiganesh Balakrishnan ,  Aswath VS ,  Sriram Murali ,  Sreenath Narayanan Potty ,  Raju Kharataram Chaudhari ,  Kapil Kumar

IPC: H04L25/03 ,  H04L27/26

Abstract: An example apparatus described herein to implement cancellation pulse generation includes a first memory storing first subsets of data samples of a single pulse cancellation waveform. The example apparatus includes a second memory storing second subsets of data samples of the single pulse cancellation waveform, the second subsets including different data samples of the single pulse cancellation waveform than the first subsets. The example apparatus includes first circuitry coupled to the first memory and to the second memory in parallel. The example apparatus includes a plurality of buffers. The example apparatus includes second circuitry coupled to the plurality of buffers.

公开(公告)号：US20250039027A1

公开(公告)日：2025-01-30

申请号：US18638460

申请日：2024-04-17

Applicant: Texas Instruments Incorporated

Inventor： Sriram Murali ,  Aswath VS ,  Sreenath Narayanan Potty ,  Raju K. Chaudhari ,  Kapil Kumar

IPC: H04L27/26 ,  H04B1/04

Abstract: An example apparatus to reduce crests in an input signal includes: memory; and programmable circuitry configured to: store a first copy and a second copy of a normalized window waveform in the memory, the first copy of the normalized window waveform including more data points than the second copy of the normalized window waveform; use the second copy of the normalized window waveform to generate a weight corresponding to a peak in the input signal; use the weight and the first copy of the normalized window waveform to generate an output waveform; generate a peak limiting waveform responsive to the output waveform; and combine the peak limiting waveform with the input signal to reduce an amplitude of the peak.

公开(公告)号：US12092721B2

公开(公告)日：2024-09-17

申请号：US17330477

申请日：2021-05-26

Applicant: Texas Instruments Incorporated

Inventor： Sachin Bharadwaj ,  Sriram Murali

IPC: G01S13/42 ,  G01S13/34 ,  G01S13/58 ,  G01S13/931 ,  G01S7/288

CPC classification number: G01S13/42 ,  G01S13/343 ,  G01S13/931 ,  G01S7/288 ,  G01S7/2883 ,  G01S13/583

Abstract: A multi-mode radar system, radar signal processing methods and configuration methods, including using predetermined, range/mode-specific pushing windows to perform windowing on range and velocity object data before performing an FFT on the windowed object data matrix to generate a three-dimensional object matrix including range, velocity and angle data. The individual windows have an angular spectral response that corresponds to a combined angular coverage field of view of the transmit and receive antennas for the corresponding mode to minimize the total weighted energy outside the main lobe and to provide increasing spectral leakage outside the combined angular coverage field of view with angular offset from the main lobe to push out much of the spectral leakage into regions where leakage tolerance is high due to the corresponding combined angular coverage field of view of the transmit and receive antennas.