公开(公告)号：US20180082733A1

公开(公告)日：2018-03-22

申请号：US15445230

申请日：2017-02-28

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Chika TANAKA ,  Keiji Ikeda ,  Toshinori Numata ,  Tsutomu Tezuka

IPC: G11C11/4091 ,  G11C11/404 ,  G11C11/408 ,  G11C11/4094

CPC classification number: G11C11/4091 ,  G11C7/065 ,  G11C11/404 ,  G11C11/4045 ,  G11C11/4087 ,  G11C11/4094 ,  G11C11/565 ,  H01L27/0688 ,  H01L27/10808 ,  H01L27/10873

Abstract: According to one embodiment, a semiconductor memory device includes a memory cell, a sense amplifier, a first transfer transistor, a second transfer transistor, and a controller. The memory cell can store a first value and a second value. The sense amplifier amplifies the first value or the second value read from the memory cell to the sense node. The first transfer transistor has a first control terminal connected to the sense node. The second transfer transistor has a second control terminal connected to the sense node. The controller applies a backgate potential to backgate terminals of the first transfer transistor and the second transfer transistor.

公开(公告)号：US09806082B2

公开(公告)日：2017-10-31

申请号：US15266798

申请日：2016-09-15

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Chika Tanaka ,  Keiji Ikeda ,  Yoshihiro Ueda ,  Toshinori Numata ,  Tsutomu Tezuka

IPC: G11C11/24 ,  H01L27/108 ,  G11C11/4091 ,  H01L29/24 ,  H01L29/78 ,  G11C11/408 ,  H01L27/06 ,  G11C11/404 ,  G11C11/405

CPC classification number: H01L27/10897 ,  G11C5/025 ,  G11C11/404 ,  G11C11/405 ,  G11C11/408 ,  G11C11/4091 ,  G11C11/4094 ,  G11C11/4097 ,  H01L27/0688 ,  H01L27/10808 ,  H01L27/1082 ,  H01L29/24 ,  H01L29/7827

Abstract: According to one embodiment, a semiconductor memory device includes a sense amplifier on a semiconductor substrate, a memory cell array including a memory cell above the sense amplifier, the memory cell including a capacitor and a first transistor, the capacitor including a first electrode and a second electrode, the first transistor including a first current path and a first control electrode controlling an on/off of the first current path, the first current path including a first terminal and a second terminal, the first terminal being electrically connected to the first electrode, and a first conductive line electrically connected to the second terminal and extending along an upper surface of the semiconductor substrate in a first direction, the first conductive line being electrically connected to the sense amplifier.