公开(公告)号：US20070265994A1

公开(公告)日：2007-11-15

申请号：US11553611

申请日：2006-11-09

申请人： Yoshihiro Ueda

发明人： Yoshihiro Ueda

IPC分类号： G06F17/30

CPC分类号： G06F17/30011 ,  G06F21/552 ,  G06F2221/2101 ,  Y10S707/99931 ,  Y10S707/99935

摘要： There is provided a document use tracking system including a use history recording unit that records, for each document stored in a document storage unit, a use history record for each user about each element in the document, a search condition reception unit that receives an input of a search condition, an element score calculation unit that calculates, for each element of each document, an element score indicating closeness of fit of the element for the search condition, an importance score calculation unit that calculates, for each combination of an element and a user who has performed an operation, an importance score based on the element score of the element and the use history record of the user for the element, and a monitored object information presentation unit that presents the importance score calculated by the importance score calculation unit and the user corresponding to the importance score.

摘要翻译： 提供了一种文件使用跟踪系统，其包括使用历史记录单元，其针对存储在文档存储单元中的每个文档记录关于每个用户关于文档中的每个元素的使用历史记录，接收输入的搜索条件接收单元 搜索条件的元素分数计算单元，针对每个文档的每个元素计算表示搜索条件的元素的拟合度的元素分数，重要度分数计算单元，对于元素的每个组合和 已经执行了操作的用户，基于元素的元素分数的重要性得分和该元素的用户的使用历史记录，以及监视对象信息呈现单元，其呈现由重要度得分计算单元计算出的重要度得分 并且用户对应于重要性得分。

公开(公告)号：US20070206406A1

公开(公告)日：2007-09-06

申请号：US11673241

申请日：2007-02-09

申请人： Yoshihiro Ueda ,  Kenji Tsuchida ,  Tsuneo Inaba ,  Kiyotaro Itagaki

发明人： Yoshihiro Ueda ,  Kenji Tsuchida ,  Tsuneo Inaba ,  Kiyotaro Itagaki

IPC分类号： G11C11/00

CPC分类号： G11C11/16 ,  Y10S977/935

摘要： A spin injection write type magnetic memory device includes memory cells which have a magnetoresistance effect element and a select transistor. The magnetoresistance effect element has one end connected to a first node. The select transistor has a first diffusion area connected to another end of the magnetoresistance effect element and a second diffusion area connected to a second node. A select line extends along a first direction and is connected to a gate electrode of the select transistor. A first interconnect extends along a second direction and is connected to the first node. A second interconnect extends along the second direction and is connected to the second node. Two of the memory cells adjacent along the first direction share the first node. Two of the memory cells adjacent along the second direction share the second node.

摘要翻译： 自旋注入写入型磁存储器件包括具有磁阻效应元件和选择晶体管的存储单元。 磁阻效应元件的一端连接到第一节点。 选择晶体管具有连接到磁阻效应元件的另一端的第一扩散区域和连接到第二节点的第二扩散区域。 选择线沿着第一方向延伸并连接到选择晶体管的栅电极。 第一互连沿着第二方向延伸并连接到第一节点。 第二互连沿着第二方向延伸并且连接到第二节点。 沿着第一方向相邻的两个存储单元共享第一节点。 沿着第二方向相邻的两个存储单元共享第二节点。

公开(公告)号：US20060198224A1

公开(公告)日：2006-09-07

申请号：US11133383

申请日：2005-05-20

申请人： Yoshihiro Ueda ,  Yoshihisa Iwata

发明人： Yoshihiro Ueda ,  Yoshihisa Iwata

IPC分类号： G11C7/02

CPC分类号： G11C11/16

摘要： A magnetic memory device includes a plurality of variable resistance elements arranged in parallel between a first and second nodes and having resistance values which vary depending on data stored in the elements, a selection transistor connected to the first node to perform selection on the plurality of variable resistance elements, and a bit line connected to the second node. A plurality of current paths including the variable resistance elements between the first and second nodes have different resistance values.

摘要翻译： 一种磁存储器件包括多个可变电阻元件，它们并联布置在第一和第二节点之间，并具有根据存储在元件中的数据而变化的电阻值;连接到第一节点的选择晶体管，以对多个变量进行选择 电阻元件和连接到第二节点的位线。 包括第一和第二节点之间的可变电阻元件的多个电流路径具有不同的电阻值。

公开(公告)号：US07006574B2

公开(公告)日：2006-02-28

申请号：US09838585

申请日：2001-04-20

申请人： Yoshihiro Ueda ,  Akiko Hayashita

发明人： Yoshihiro Ueda ,  Akiko Hayashita

IPC分类号： H04N7/12 ,  H04N11/02

CPC分类号： H04N19/89 ,  H04N7/52 ,  H04N7/56

摘要： A receiving apparatus receives a bitstream that is divided into units encoding a moving picture and includes a stream header indicating how the units are to be decoded. The receiving apparatus estimates the contents of the stream header from the contents of the units, so that decoding of the units can begin before the stream header is received. The receiving apparatus preferably checks for errors in the analysis and decoding of the units, and modifies the estimated stream-header information when an error is discovered. The same unit may be analyzed and decoded repeatedly to hasten the correct estimation of the stream-header information.

公开(公告)号：USD354048S

公开(公告)日：1995-01-03

申请号：US6883

申请日：1993-04-12

申请人： Koji Kimura ,  Yoshihiro Ueda ,  Takeshi Ichimaru ,  Yukihiko Oashi

设计人： Koji Kimura ,  Yoshihiro Ueda ,  Takeshi Ichimaru ,  Yukihiko Oashi

公开(公告)号：US4975924A

公开(公告)日：1990-12-04

申请号：US346111

申请日：1989-05-30

申请人： Akihiko Iwata ,  Shigeo Ueguri ,  Kazuhiko Hara ,  Tatsuki Okamoto ,  Yoshihiro Ueda ,  Hiroshi Itoh

发明人： Akihiko Iwata ,  Shigeo Ueguri ,  Kazuhiko Hara ,  Tatsuki Okamoto ,  Yoshihiro Ueda ,  Hiroshi Itoh

IPC分类号： H01S3/03

CPC分类号： H01S3/031

摘要： A metallic vapor laser apparatus comprises a discharge tube, a first pulse circuit (200) for generating a first pulse voltage for causing laser oscillation and a second pulse conduit (16) disposed separately from the first pulse circuit and generating a second pulse voltage delayed from the generation of the first pulse voltage by a predetermined time. The metallic vapor laser apparatus is constructed such that, after the first pulse voltage is applied to the discharge tube, the second pulse voltage is applied to the discharge tube and an output voltage of the second pulse circuit (16) is less than an output voltage of the first pulse circuit (200).

摘要翻译： PCT No.PCT / JP88 / 00805 Sec。 371日期1989年5月30日 102（e）日期1989年5月30日PCT提交1988年8月13日PCT公布。 出版物WO89 / 01713 日本特开1989年2月23日。一种金属蒸汽激光装置，包括放电管，用于产生用于引起激光振荡的第一脉冲电压的第一脉冲电路（200）和与第一脉冲电路分开设置的第二脉冲导管（16） 产生从所述第一脉冲电压的产生延迟预定时间的第二脉冲电压。 金属蒸汽激光装置的结构使得在将第一脉冲电压施加到放电管之后，将第二脉冲电压施加到放电管，并且第二脉冲电路（16）的输出电压小于输出电压 的第一脉冲电路（200）。

公开(公告)号：US4445020A

公开(公告)日：1984-04-24

申请号：US479920

申请日：1983-04-04

申请人： Yoshihiro Ueda ,  Hiroyuki Sasao ,  Suenobu Hamano ,  Suichiro Okuda

发明人： Yoshihiro Ueda ,  Hiroyuki Sasao ,  Suenobu Hamano ,  Suichiro Okuda

IPC分类号： H01H33/90 ,  H01H33/915 ,  H01H33/88

CPC分类号： H01H33/901 ,  H01H2033/907

摘要： A circuit interrupter comprises a pair of mutually detachable contacts;a cylinder-piston negative pressure device for providing a negative pressure by detaching said contacts; anda suction guide for feeding the arcing formed by the detaching operation of said contacts, into said cylinder-piston negative pressure device.

摘要翻译： 电路断续器包括一对相互可拆卸的触点; 气缸活塞负压装置，用于通过分离所述触头来提供负压; 以及用于将由所述触头的拆卸操作形成的电弧馈送到所述气缸 - 活塞负压装置中的抽吸引导件。

公开(公告)号：US08705270B2

公开(公告)日：2014-04-22

申请号：US13415662

申请日：2012-03-08

申请人： Masahiro Takahashi ,  Yoshihiro Ueda

发明人： Masahiro Takahashi ,  Yoshihiro Ueda

IPC分类号： G11C11/00 ,  G11C11/16

CPC分类号： G11C11/16 ,  G11C11/1659 ,  G11C11/1675

摘要： A semiconductor memory has a first switch circuit and a second switch circuit. The semiconductor memory has a row decoder that controls a voltage of a word line. The semiconductor memory has a first writing circuit including a first signal terminal connected to one end of the first switch circuit to input and output a writing current. The semiconductor memory has a second writing circuit including a second signal terminal connected to a one end of the second switch circuit to input and output the writing current. The semiconductor memory has a select transistor including a control terminal connected to the word line. The semiconductor memory has a resistance change element that is connected in series with the select transistor between the first bit line and the second bit line and varies in resistance value depending on an applied current.

摘要翻译： 半导体存储器具有第一开关电路和第二开关电路。 半导体存储器具有控制字线电压的行解码器。 半导体存储器具有第一写入电路，该第一写入电路包括连接到第一开关电路的一端的第一信号端子，以输入和输出写入电流。 半导体存储器具有第二写入电路，该第二写入电路包括连接到第二开关电路的一端的第二信号端子，以输入和输出写入电流。 半导体存储器具有包括连接到字线的控制端的选择晶体管。 半导体存储器具有与第一位线和第二位线之间的选择晶体管串联连接的电阻变化元件，并根据所施加的电流而变化电阻值。

公开(公告)号：US08630136B2

公开(公告)日：2014-01-14

申请号：US13422110

申请日：2012-03-16

申请人： Yoshihiro Ueda ,  Kosuke Hatsuda

发明人： Yoshihiro Ueda ,  Kosuke Hatsuda

IPC分类号： G11C7/00

CPC分类号： G11C11/1673

摘要： A semiconductor memory includes a first memory cell including: a first resistance change element and a first select transistor. The semiconductor memory includes a second memory cell including: a second select transistor and a second resistance change element. The semiconductor memory includes a third memory cell including: a third select transistor and a third resistance change element, the third memory cell acting as a reference cell. The semiconductor memory includes a fourth memory cell including: a fourth resistance change element and a fourth select transistor, the fourth memory cell acting as a reference cell.

摘要翻译： 半导体存储器包括：第一存储单元，包括：第一电阻变化元件和第一选择晶体管。 半导体存储器包括第二存储单元，其包括：第二选择晶体管和第二电阻变化元件。 半导体存储器包括第三存储单元，第三存储单元包括：第三选择晶体管和第三电阻变化元件，第三存储单元用作参考单元。 半导体存储器包括：第四存储单元，包括：第四电阻变化元件和第四选择晶体管，第四存储单元用作参考单元。

公开(公告)号：US08498144B2

公开(公告)日：2013-07-30

申请号：US13191678

申请日：2011-07-27

申请人： Masahiro Takahashi ,  Katsuyuki Fujita ,  Yoshihiro Ueda ,  Katsuhiko Hoya

发明人： Masahiro Takahashi ,  Katsuyuki Fujita ,  Yoshihiro Ueda ,  Katsuhiko Hoya

IPC分类号： G11C11/00 ,  G11C11/15

CPC分类号： G11C8/10 ,  G11C8/08 ,  G11C11/1675 ,  G11C11/1693

摘要： A semiconductor storage device includes first to fourth switch circuit. The semiconductor storage device includes a row decoder which controls a voltage of a word line. The semiconductor storage device includes a first selection transistor of which a control terminal is connected to the word line. The semiconductor storage device includes a first resistance change element which is connected in series to the first selection transistor between the first bit line and the second bit line, and of which a resistance value changes according to a flowing current. The semiconductor storage device includes a second selection transistor of which a control terminal is connected to the word line. The semiconductor storage device includes a second resistance change element which is connected in series to the second selection transistor between the second bit line and the third bit line, and of which a resistance value changes according to a flowing current.

摘要翻译： 半导体存储装置包括第一至第四开关电路。 半导体存储装置包括用于控制字线电压的行译码器。 半导体存储装置包括控制端子连接到字线的第一选择晶体管。 半导体存储装置包括与第一位线和第二位线之间的第一选择晶体管串联连接的第一电阻变化元件，其电阻值根据流动电流而变化。 半导体存储装置包括控制端子连接到字线的第二选择晶体管。 半导体存储装置包括与第二位线和第三位线之间的第二选择晶体管串联连接的第二电阻变化元件，其电阻值根据流动电流而变化。