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公开(公告)号:US20220020642A1
公开(公告)日:2022-01-20
申请号:US17487987
申请日:2021-09-28
Applicant: TOKYO ELECTRON LIMITED
Inventor: Xinghua Sun , Yen-Tien Lu , Angelique Raley , David O'meara , Jeffrey Smith
IPC: H01L21/768 , H01L21/02
Abstract: Methods are disclosed that provide improved via profile control by forming atomic layer deposition (ALD) liners to protect side walls of vias during subsequent etch processes. ALD liners can be used for BEOL etch processes as well as for full self-aligned via (FSAV) processes and/or other processes. For one embodiment, ALD liners are used as protection or sacrificial layers for vias to reduce damage during multilayer via or trench etch processes. The ALD liners can also be deposited at different points within process flows, for example, before or after removal of organic planarization layers. The use of ALD liners facilitates shrinking of via critical dimensions (CDs) while still controlling via profiles for various process applications including dual Damascene processes and FSAV processes. In addition, the use of ALD liners improves overall CD control for via or hole formation as well as device yield and reliability.
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公开(公告)号:US20210407790A1
公开(公告)日:2021-12-30
申请号:US17180077
申请日:2021-02-19
Applicant: Tokyo Electron Limited
Inventor: Michael Edley , Xinghua Sun , Yen-Tien Lu , Angelique Raley , Henan Zhang , Hiroyuki Suzuki , Shan Hu
IPC: H01L21/02 , H01L21/311 , H01L21/67
Abstract: A method for processing a substrate includes performing a first etch process to form a plurality of partial features in a dielectric layer disposed over the substrate; performing an irradiation process to irradiate the substrate with ultra-violet radiation having a wavelength between 100 nm and 200 nm; and after the irradiation process, performing a second etch process to form a plurality of features from the plurality of partial features.
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公开(公告)号:US20210242074A1
公开(公告)日:2021-08-05
申请号:US16782344
申请日:2020-02-05
Applicant: Tokyo Electron Limited
Inventor: Yen-Tien Lu , Kai-Hung Yu , Xinghua Sun , Angelique Raley
IPC: H01L21/768 , H01L21/02 , H01L21/67 , H01L21/311
Abstract: Methods and systems for selective deposition of conductive a cap for FAV features are described. In an embodiment, a method may include receiving a substrate having an interlayer dielectrics (ILD) layer, the ILD layer having a recess, the recess having a conductive layer formed therein, the conductive layer comprising a first conductive material. Additionally, such a method may include forming a cap within a region defined by the recess and in contact with a surface of the conductive layer, the cap comprising a second conductive material. The method may also include forming a conformal etch stop layer in contact with a surface of the cap and in contact with a region of the ILD layer. Further, the method may include selectively etching the etch stop layer using a plasma etch process, wherein the plasma etch process removes the etch stop layer selective to the second conductive material comprising the cap.
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公开(公告)号:US20190237331A1
公开(公告)日:2019-08-01
申请号:US16252949
申请日:2019-01-21
Applicant: Tokyo Electron Limited
Inventor: Yen-Tien Lu , Kai-Hung Yu , Andrew Metz
IPC: H01L21/033 , H01L21/311 , H01L21/768
CPC classification number: H01L21/0338 , H01L21/0332 , H01L21/0335 , H01L21/0337 , H01L21/31116 , H01L21/31144 , H01L21/76816 , H01L21/76877
Abstract: Embodiments are disclosed for a method to process microelectronic workpieces including forming a metal hard mask layer including ruthenium (Ru MHM layer) over one or more underlying layers on a substrate for a microelectronic workpiece, etching the Ru MHM layer to provide a patterned Ru MHM layer, and etching the one or more underlying layers using the patterned Ru MHM layer as a mask to protect portion of the one or more underlying layers. For one embodiment, the Ru MHM layer is a material including 95 percent or more of ruthenium (Ru). For another embodiment, the Ru MHM layer is a material including 70 percent or more of ruthenium (Ru). Further, the Ru MHM layer preferably has a selectivity of 10 or greater with respect to a next underlying layer adjacent to the Ru MHM layer, such as a SiN hard mask layer.
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