公开(公告)号：US20060054889A1

公开(公告)日：2006-03-16

申请号：US10942039

申请日：2004-09-16

申请人： Jang-Soo Kim ,  Hyang-Shik Kong ,  Hye-Young Ryu ,  Sung-Man Kim

发明人： Jang-Soo Kim ,  Hyang-Shik Kong ,  Hye-Young Ryu ,  Sung-Man Kim

IPC分类号： H01L29/04

CPC分类号： H01L27/124 ,  G02F1/136213 ,  G02F1/136259 ,  G02F2001/13629 ,  H01L27/1255 ,  H01L27/1288

摘要： A thin film transistor array panel comprising: an insulating substrate; a plurality of gate lines formed on the insulating substrate and including a plurality of gate electrodes and end portions; a plurality of storage electrode lines formed on the insulating substrate; a gate insulating layer formed on the gate lines and storage electrode lines; a semiconductor layer formed on the gate insulating layer; a ohmic contact layer formed on the semiconductor layer; a plurality of data lines formed on the gate insulating layer, intersecting the gate lines to define a display area, and having source electrodes and end portions; a plurality of drain electrodes facing the source electrodes; a passivation layer formed on the data lines and drain electrodes and having contact holes; a plurality of pixel electrodes formed on the passivation layer and connected to the drain electrodes through the contact holes; a storage line connecting bar connecting the storage electrode lines; and a redundant connecting line connecting the storage electrode lines is provided.

摘要翻译： 1.一种薄膜晶体管阵列面板，包括：绝缘基板; 多个栅极线，形成在所述绝缘基板上并且包括多个栅电极和端部; 形成在所述绝缘基板上的多个存储电极线; 形成在栅极线和存储电极线上的栅极绝缘层; 形成在所述栅极绝缘层上的半导体层; 形成在所述半导体层上的欧姆接触层; 形成在所述栅极绝缘层上的多条数据线，与所述栅极线交叉以限定显示区域，并具有源电极和端部; 面对所述源电极的多个漏电极; 形成在数据线和漏电极上并具有接触孔的钝化层; 多个像素电极，形成在钝化层上并通过接触孔连接到漏电极; 连接存储电极线的存储线连接条; 并且提供连接存储电极线的冗余连接线。

公开(公告)号：US06445004B1

公开(公告)日：2002-09-03

申请号：US09617311

申请日：2000-07-14

申请人： Chang-Oh Jeong ,  Yang-Sun Kim ,  Myung-Koo Hur ,  Young-Jae Tak ,  Mun-Pyo Hong ,  Chi-Woo Kim ,  Jang-Soo Kim ,  Chun-Gi You

发明人： Chang-Oh Jeong ,  Yang-Sun Kim ,  Myung-Koo Hur ,  Young-Jae Tak ,  Mun-Pyo Hong ,  Chi-Woo Kim ,  Jang-Soo Kim ,  Chun-Gi You

IPC分类号： H01L2904

CPC分类号： G02F1/136286 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/13629 ,  H01L21/28008 ,  H01L23/4827 ,  H01L29/42384 ,  H01L29/4908 ,  H01L2924/0002 ,  H01L2924/00

摘要： The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl(+He) or SF6+Cl2(+He) can form the edge profile of contact holes to be smoothed. Also, when an amorphous silicon layer formed under the Mo or MoW layer is etched using the Mo or MoW layer as a mask, using an etch gas system that employs a gas such as hydrogen halide and at least one gas selected from CF4, CHF3, CHClF2, CH3F, and C2F6, yields good TFT characteristics, and H2 plasma treatment can further improve the TFT characteristics.

摘要翻译： Mo或MoW组合物层具有小于15μOMEGAcm的低电阻率，并且使用Al合金附魔或Cr附魔被蚀刻成具有平滑的锥角，并且Mo或MoW层用于显示器或 半导体显示器以及Al层或Cr层。 由于通过调节沉积压力可以沉积Mo或MoW层以便对基底施加低应力，所以可以单独使用单个MoW层作为布线。 当在钝化层或栅极绝缘层中形成接触孔时，通过使用聚合物层减少横向蚀刻，使用CF 4 + O 2的蚀刻气体系统可以防止Mo或MoW合金层的蚀刻，以及蚀刻气体 SF6 + HCl（+ He）或SF6 + Cl2（+ He）可以形成要平滑的接触孔的边缘轮廓。 此外，当使用Mo或MoW层作为掩模蚀刻形成在Mo或MoW层下面的非晶硅层时，使用采用诸如卤化氢和至少一种选自CF 4，CHF 3的气体的气体的蚀刻气体系统， CHClF 2，CH 3 F和C 2 F 6，产生良好的TFT特性，并且H 2等离子体处理可以进一步提高TFT特性。

公开(公告)号：US06441401B1

公开(公告)日：2002-08-27

申请号：US09527803

申请日：2000-03-17

申请人： Cheol-Soo Jung ,  Young-Sun Kim ,  Ho-Joon Lee ,  Yeong-Hwan Cho ,  Hyeon-Hwan Kim ,  Bung-Hyuk Min ,  Woon-Yong Park ,  Il-Gon Kim ,  Jang-Soo Kim ,  Jin-Oh Kwag ,  Seog-Chae Lee

发明人： Cheol-Soo Jung ,  Young-Sun Kim ,  Ho-Joon Lee ,  Yeong-Hwan Cho ,  Hyeon-Hwan Kim ,  Bung-Hyuk Min ,  Woon-Yong Park ,  Il-Gon Kim ,  Jang-Soo Kim ,  Jin-Oh Kwag ,  Seog-Chae Lee

IPC分类号： H01L2900

CPC分类号： G02F1/136259 ,  G02F2001/136263 ,  G02F2001/136272 ,  H01L27/12

摘要： A gate line extending in a horizontal direction is formed on an insulating substrate, and a data line is formed perpendicular to the gate line defining a pixel of a matrix array. Pixel electrodes receiving image signals through the data line are formed in a pixel, and a thin film transistor having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode is formed on the portion where the gate lines and the data lines intersect. A storage wire including a storage electrode line in the horizontal direction, a storage electrode connected to the storage electrode line, and at least one of the storage electrode connection portions connecting storage electrodes of neighboring pixels is formed in the same direction as the gate line. A redundant repair line overlaps and is insulated from the storage wire at one end and overlaps the storage wire or the gate wire of a neighboring pixel at the other end is formed in the same layer as the data wire. Also, a storage wire connection portion connecting the storage wires of a neighboring pixel is formed in the same layer as the pixel electrode. In this structure, if portions of the gate wire or the data wire are disconnected, the portions overlapping the disconnected wire, the storage wire, and the redundant repair line are shorted to repair an open wire defect.

摘要翻译： 在绝缘基板上形成沿水平方向延伸的栅极线，并且垂直于限定矩阵阵列的像素的栅极线形成数据线。 通过数据线接收图像信号的像素电极形成在像素中，并且形成具有连接到栅极线的栅电极，连接到数据线的源电极和连接到像素电极的漏电极的薄膜晶体管 在栅极线和数据线相交的部分。 包括在水平方向上存储电极线的存储线，连接到存储电极线的存储电极以及连接相邻像素的存储电极的至少一个存储电极连接部分沿与栅极线相同的方向形成。 冗余维修线在一端重叠并与存储线绝缘，并与存储线重叠，另一端的相邻像素的栅极线形成在与数据线相同的层中。 此外，连接相邻像素的存储线的存储线连接部分形成在与像素电极相同的层中。 在这种结构中，如果栅极线或数据线的部分断开，与断开的线，存储线和冗余修复线重叠的部分短路以修复开路的线缺陷。

公开(公告)号：US08642367B2

公开(公告)日：2014-02-04

申请号：US13042348

申请日：2011-03-07

申请人： Yu-Gwang Jeong ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

发明人： Yu-Gwang Jeong ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

IPC分类号： H01L21/02

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/66765

摘要： Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

摘要翻译： 本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体 栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。

公开(公告)号：US20130320347A1

公开(公告)日：2013-12-05

申请号：US13951543

申请日：2013-07-26

申请人： Young-Wook Lee ,  Jang-Soo Kim

发明人： Young-Wook Lee ,  Jang-Soo Kim

IPC分类号： H01L27/12

CPC分类号： H01L27/124 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1365 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136222 ,  G02F2001/13629 ,  H01L27/1248

摘要： A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

公开(公告)号：US08493540B2

公开(公告)日：2013-07-23

申请号：US12335095

申请日：2008-12-15

申请人： Kyoung-Tai Han ,  Jang-Soo Kim ,  Byung-Duk Yang

发明人： Kyoung-Tai Han ,  Jang-Soo Kim ,  Byung-Duk Yang

IPC分类号： G02F1/1339

CPC分类号： G02F1/13394 ,  G02F1/133512 ,  G02F1/136209 ,  G02F2001/136222 ,  H01L27/12 ,  H01L27/1214

摘要： A display panel comprises a first substrate, a second substrate including a display area and a peripheral area surrounding the display area, a transistor layer including, formed in the display area of the substrate, at least one transistor connected to a gate line and a data line, at least one color filter formed in a plurality of pixel regions on the transistor layer, a light blocking member disposed between the color filters, at least one pixel electrode formed on the color filter, an opaque spacing part formed on the color filter corresponding to the transistor so as to maintain a cell gap between the first and second substrates. The light blocking member in some embodiments of the invention is not formed on the first and second transistors to allow for inspection of a channel in the transistor.

摘要翻译： 显示面板包括第一基板，包括显示区域和围绕显示区域的外围区域的第二基板，包括形成在基板的显示区域中的至少一个连接到栅极线的晶体管和数据的晶体管层 形成在所述晶体管层上的多个像素区域中的至少一个滤色器，设置在所述滤色器之间的遮光构件，形成在所述滤色器上的至少一个像素电极，形成在所述滤色器上的不透明间隔部分 以保持第一和第二基板之间的单元间隙。 本发明的一些实施例中的阻光构件不形成在第一和第二晶体管上，以允许检查晶体管中的沟道。

公开(公告)号：US20130009157A1

公开(公告)日：2013-01-10

申请号：US13614182

申请日：2012-09-13

申请人： Young-Wook Lee ,  Jang-Soo Kim

发明人： Young-Wook Lee ,  Jang-Soo Kim

IPC分类号： H01L27/088

CPC分类号： H01L27/124 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1365 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136222 ,  G02F2001/13629 ,  H01L27/1248

摘要： A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

公开(公告)号：US08279388B2

公开(公告)日：2012-10-02

申请号：US12499212

申请日：2009-07-08

申请人： Young-Wook Lee ,  Jang-Soo Kim ,  Kang-Woo Kim ,  Youn-Hak Jeong

发明人： Young-Wook Lee ,  Jang-Soo Kim ,  Kang-Woo Kim ,  Youn-Hak Jeong

IPC分类号： G02F1/1343 ,  G02F1/1335

CPC分类号： G02F1/136286 ,  G02F1/136209 ,  G02F2001/136222 ,  G02F2001/13629

摘要： A liquid crystal display includes a first substrate, a plurality of gate lines formed on the first substrate, a plurality of data lines intersecting the gate lines, a plurality of thin film transistors connected to the gate lines and the data lines, a plurality of color filters formed on the gate lines, the data lines, and the thin film transistors, a plurality of first electrodes made of a transparent conductor formed on the color filters, and electrically connected to the thin film transistors, a first passivation layer formed on the first electrodes, a second electrode formed on the first passivation layer, and including a plurality of branch electrodes, a second substrate facing the first substrate, and a liquid crystal layer disposed between the first substrate and the second substrate.

摘要翻译： 液晶显示器包括第一基板，形成在第一基板上的多个栅极线，与栅极线交叉的多个数据线，连接到栅极线和数据线的多个薄膜晶体管，多个颜色 形成在栅极线，数据线和薄膜晶体管上的滤波器，形成在滤色器上的透明导体制成的多个第一电极，并与薄膜晶体管电连接;第一钝化层，形成在第一 电极，形成在第一钝化层上的第二电极，并且包括多个分支电极，面对第一基板的第二基板和设置在第一基板和第二基板之间的液晶层。

公开(公告)号：US08098360B2

公开(公告)日：2012-01-17

申请号：US12477342

申请日：2009-06-03

申请人： Kyung-Sook Jeon ,  Jang-Soo Kim ,  Hwa-Yeul Oh

发明人： Kyung-Sook Jeon ,  Jang-Soo Kim ,  Hwa-Yeul Oh

IPC分类号： G02F1/1339 ,  G02F1/136 ,  G02F1/1333

CPC分类号： G02F1/13624 ,  G02F1/136209 ,  G02F2001/134345 ,  G02F2001/136222

摘要： The present application relates to a liquid crystal display including a first substrate, a plurality of gate lines, a plurality of data lines, thin film transistors connected to the gate and data lines, a barrier rib formed on the data lines, and pixel electrodes connected to the thin film transistors. The thin film transistors can be formed using a colored organic film that has an optical density in a range of 1 to 3. Color filters fill the regions surrounded by the barrier rib. Pixel electrodes can be formed on the color filters. A common electrode can be formed on the second substrate facing the first substrate. A liquid crystal layer can be situated between the first and second substrates, which are spaced apart at a predetermined distance by spacers.

摘要翻译： 本申请涉及一种液晶显示器，包括第一基板，多条栅极线，多条数据线，连接到栅极和数据线的薄膜晶体管，形成在数据线上的障壁，以及连接的像素电极 到薄膜晶体管。 可以使用光密度在1〜3范围内的有色有机膜来形成薄膜晶体管。滤色器填充由障壁围绕的区域。 像素电极可以形成在滤色器上。 可以在面向第一基板的第二基板上形成公共电极。 液晶层可以位于第一和第二基板之间，间隔物以预定距离隔开。

公开(公告)号：US20120007088A1

公开(公告)日：2012-01-12

申请号：US13238788

申请日：2011-09-21

申请人： Young-Wook Lee ,  Jang-Soo Kim

发明人： Young-Wook Lee ,  Jang-Soo Kim

IPC分类号： H01L33/08 ,  H01L33/16

CPC分类号： H01L27/124 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1365 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136222 ,  G02F2001/13629 ,  H01L27/1248

摘要： A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

摘要翻译： 薄膜晶体管阵列面板包括基板; 形成在所述基板上的多条栅极线; 与栅极线相交的多条数据线; 连接到栅极线和数据线的多个薄膜晶体管; 形成在栅极线，数据线和薄膜晶体管的上部的多个滤色器; 形成在滤色器上并且包括透明导体的公共电极; 钝化层，其形成在所述公共电极的上部; 以及形成在钝化层的上部并且连接到每个薄膜晶体管的漏电极的多个像素电极。