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59 条记录 (耗时 0.02 秒)

    Nonradiative planar dielectric line and integrated circuit
    21.
    发明授权
    Nonradiative planar dielectric line and integrated circuit 失效
    非辐射平面介质线和集成电路

    公开(公告)号：US6166614A

    公开(公告)日：2000-12-26

    申请号：US92290

    申请日：1998-06-05

    申请人： Yohei Ishikawa ,  Koichi Sakamoto ,  Atsushi Saitoh ,  Kenichi Iio

    发明人： Yohei Ishikawa ,  Koichi Sakamoto ,  Atsushi Saitoh ,  Kenichi Iio

    IPC分类号： H01P3/02 ,  H01P3/16 ,  H01P3/00

    CPC分类号： H01P3/165 ,  H01P3/023

    摘要： A nonradiative planar dielectric line exhibits low transmission losses and is easily connectable to electronic components. A first slot is provided between two electrodes on a first main surface of a dielectric plate. A second slot is provided between two electrodes on a second main surface of the dielectric plate. A first conductor is electrically connected to the electrodes on the first main surface and also covers the first slot. A second conductor is electrically connected to the electrodes on the second main surface and also covers the second slot. An integrated circuit using the above type of dielectric line is also provided. Thus, apparatuses using the above dielectric lines or integrated circuits are miniaturized.

    摘要翻译： 非辐射平面介质线显示出低的传输损耗并且易于连接到电子部件。 在电介质板的第一主表面上的两个电极之间设置第一槽。 在电介质板的第二主表面上的两个电极之间设置第二槽。 第一导体电连接到第一主表面上的电极并且还覆盖第一槽。 第二导体电连接到第二主表面上的电极并且还覆盖第二槽。 还提供了使用上述类型的介质线的集成电路。 因此，使用上述介质线或集成电路的装置被小型化。

    Dielectric line waveguide which forms electronic circuits
    22.
    发明授权
    Dielectric line waveguide which forms electronic circuits 失效
    形成电子线路的介质线波导

    公开(公告)号：US5872485A

    公开(公告)日：1999-02-16

    申请号：US901149

    申请日：1997-07-28

    申请人： Yohei Ishikawa ,  Koichi Sakamoto ,  Sadao Yamashita ,  Takehisa Kajikawa

    发明人： Yohei Ishikawa ,  Koichi Sakamoto ,  Sadao Yamashita ,  Takehisa Kajikawa

    IPC分类号： H05K1/16 ,  H01L21/822 ,  H01L27/04 ,  H01P3/16 ,  H01P5/02 ,  H01P5/08 ,  H01P5/12 ,  H03F3/60 ,  H03F3/68 ,  H01P5/00 ,  H03B5/12 ,  H04B1/26

    CPC分类号： H01P5/087

    摘要： An amplifying circuit is formed by a combination of a dielectric line waveguide and a semiconductor device. Two electrically conductive plates are provided substantially parallel to each other. Two dielectric strips are disposed between the two conductive plates, and a dielectric plate is further inserted between the dielectric strips. Ground conductors are formed on the dielectric plate. The ground conductors have an area which equals an amount required for blocking a RF signal propagating in the dielectric line waveguide. A slot line is formed between the ground conductors in a position intermediate opposed sides of the dielectric strips. Line-switching conductor patterns are provided at both sides of the ends of the slot line. A field-effect transistor is mounted on the slot line such that it bridges over the slot line. Accordingly, losses and distortion of an RF signal, which would occur in an input/output circuit, are suppressed, and the generation of parasitic coupling is eliminated. Further, the dielectric line waveguide is miniaturized free from an external circuit, and accordingly, the manufacturing cost is reduced as well.

    摘要翻译： 放大电路由介质线波导和半导体器件的组合形成。 两个导电板基本上彼此平行地设置。 在两个导电板之间设置两个介质条，并且介质板进一步插入介质条之间。 接地导体形成在电介质板上。 接地导体具有等于阻挡在介质线波导中传播的RF信号所需的量的面积。 在介质条的相对两侧的位置上，在接地导体之间形成槽线。 线路切换导体图案设置在槽线的两端的两侧。 场效应晶体管安装在槽线上，使得其跨越槽线。 因此，抑制了在输入/输出电路中发生的RF信号的损耗和失真，消除了寄生耦合的产生。 此外，介电线路波导小型化而没有外部电路，因此也降低了制造成本。

    Planar dielectric integrated circuit
    25.
    发明授权
    Planar dielectric integrated circuit 失效
    平面电介质集成电路

    公开(公告)号：US06169301A

    公开(公告)日：2001-01-02

    申请号：US09030971

    申请日：1998-02-26

    申请人： Yohei Ishikawa ,  Koichi Sakamoto ,  Sadao Yamashita ,  Takehisa Kajikawa

    发明人： Yohei Ishikawa ,  Koichi Sakamoto ,  Sadao Yamashita ,  Takehisa Kajikawa

    IPC分类号： H01L2980

    CPC分类号： H01L23/66 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    摘要： A planar dielectric integrated circuit is provided such that energy conversion loss between a planar dielectric line and electronic components is small and that impedance matching between them can be easily obtained. By providing slots which oppose both main surfaces of a circuit substrate, two planar dielectric lines are constructed. A slot line, and a first line-conversion conductor pattern which is connected to the electromagnetic field of the slot line and a first planar dielectric line in order to perform line conversion, are provided at the end portion of the first planar dielectric line, including a slot. A coplanar line and a second line-conversion conductor which is made to project in a direction at right angles to a second planar dielectric line is provided at the end portion of the second planar dielectric line, including a slot. A semiconductor device is placed in such a manner as to be extended over the coplanar line and the slot line.

    摘要翻译： 提供了平面介质集成电路，使得平面介质线和电子部件之间的能量转换损耗小，并且可以容易地获得它们之间的阻抗匹配。 通过提供与电路基板的两个主表面相对的槽，构成两个平面介质线。 在第一平面介质线的端部设置有槽线和连接到槽线的电磁场和第一平面介质线以进行线路转换的第一线路转换导体图案，包括 一个插槽。 在包括槽的第二平面介质线的端部设置有共面线和第二线转换导体，其在与第二平面介质线成直角的方向上突出。 半导体器件被放置成在共面线和缝线上延伸。

    Transmission line connecting structure and transmission/reception device
    27.
    发明申请
    Transmission line connecting structure and transmission/reception device 有权
    传输线连接结构和发射/接收装置

    公开(公告)号：US20070176713A1

    公开(公告)日：2007-08-02

    申请号：US10589626

    申请日：2005-07-25

    申请人： Kazutaka Mukaiyama ,  Shigeyuki Mikami ,  Yohei Ishikawa

    发明人： Kazutaka Mukaiyama ,  Shigeyuki Mikami ,  Yohei Ishikawa

    IPC分类号： H01P7/00

    CPC分类号： H01P1/2016 ,  H01P5/02 ,  H05K1/0239 ,  H05K1/142

    摘要： A transmission line having a slot line with a slot formed on a front surface electrode on a dielectric substrate, and two such slot lines are positioned with the front surface electrodes separated from one another with a gap therebetween. A slot resonator with one end open at the gap side is provided at the front edge side of each slot line, and these slot resonators are positioned so as to be capable of coupling to one another. A slot stub which is branched out from the gap side is provided on each front surface electrode. Thus, leakage of a high-frequency signal in the gap can be suppressed with the slot stub.

    摘要翻译： 具有形成在电介质基板上的前表面电极上的槽的槽线和两个这样的槽线的传输线被定位，其中前表面电极彼此间隔开间隔开。 在每个槽线的前边缘侧设置有在间隙侧开口一端的缝隙谐振器，并且这些缝隙谐振器被定位成能够彼此耦合。 在每个前表面电极上设置从间隙侧分出的狭缝短截线。 因此，可以利用槽插槽来抑制间隙中的高频信号的泄漏。