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42 条记录 (耗时 0.021 秒)

    Dielectric line waveguide which forms electronic circuits
    1.
    发明授权
    Dielectric line waveguide which forms electronic circuits 失效
    形成电子线路的介质线波导

    公开(公告)号：US5872485A

    公开(公告)日：1999-02-16

    申请号：US901149

    申请日：1997-07-28

    申请人： Yohei Ishikawa ,  Koichi Sakamoto ,  Sadao Yamashita ,  Takehisa Kajikawa

    发明人： Yohei Ishikawa ,  Koichi Sakamoto ,  Sadao Yamashita ,  Takehisa Kajikawa

    IPC分类号： H05K1/16 ,  H01L21/822 ,  H01L27/04 ,  H01P3/16 ,  H01P5/02 ,  H01P5/08 ,  H01P5/12 ,  H03F3/60 ,  H03F3/68 ,  H01P5/00 ,  H03B5/12 ,  H04B1/26

    CPC分类号： H01P5/087

    摘要： An amplifying circuit is formed by a combination of a dielectric line waveguide and a semiconductor device. Two electrically conductive plates are provided substantially parallel to each other. Two dielectric strips are disposed between the two conductive plates, and a dielectric plate is further inserted between the dielectric strips. Ground conductors are formed on the dielectric plate. The ground conductors have an area which equals an amount required for blocking a RF signal propagating in the dielectric line waveguide. A slot line is formed between the ground conductors in a position intermediate opposed sides of the dielectric strips. Line-switching conductor patterns are provided at both sides of the ends of the slot line. A field-effect transistor is mounted on the slot line such that it bridges over the slot line. Accordingly, losses and distortion of an RF signal, which would occur in an input/output circuit, are suppressed, and the generation of parasitic coupling is eliminated. Further, the dielectric line waveguide is miniaturized free from an external circuit, and accordingly, the manufacturing cost is reduced as well.

    摘要翻译： 放大电路由介质线波导和半导体器件的组合形成。 两个导电板基本上彼此平行地设置。 在两个导电板之间设置两个介质条，并且介质板进一步插入介质条之间。 接地导体形成在电介质板上。 接地导体具有等于阻挡在介质线波导中传播的RF信号所需的量的面积。 在介质条的相对两侧的位置上，在接地导体之间形成槽线。 线路切换导体图案设置在槽线的两端的两侧。 场效应晶体管安装在槽线上，使得其跨越槽线。 因此，抑制了在输入/输出电路中发生的RF信号的损耗和失真，消除了寄生耦合的产生。 此外，介电线路波导小型化而没有外部电路，因此也降低了制造成本。

    Planar dielectric integrated circuit
    3.
    发明授权
    Planar dielectric integrated circuit 失效
    平面电介质集成电路

    公开(公告)号：US06169301A

    公开(公告)日：2001-01-02

    申请号：US09030971

    申请日：1998-02-26

    申请人： Yohei Ishikawa ,  Koichi Sakamoto ,  Sadao Yamashita ,  Takehisa Kajikawa

    发明人： Yohei Ishikawa ,  Koichi Sakamoto ,  Sadao Yamashita ,  Takehisa Kajikawa

    IPC分类号： H01L2980

    CPC分类号： H01L23/66 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    摘要： A planar dielectric integrated circuit is provided such that energy conversion loss between a planar dielectric line and electronic components is small and that impedance matching between them can be easily obtained. By providing slots which oppose both main surfaces of a circuit substrate, two planar dielectric lines are constructed. A slot line, and a first line-conversion conductor pattern which is connected to the electromagnetic field of the slot line and a first planar dielectric line in order to perform line conversion, are provided at the end portion of the first planar dielectric line, including a slot. A coplanar line and a second line-conversion conductor which is made to project in a direction at right angles to a second planar dielectric line is provided at the end portion of the second planar dielectric line, including a slot. A semiconductor device is placed in such a manner as to be extended over the coplanar line and the slot line.

    摘要翻译： 提供了平面介质集成电路，使得平面介质线和电子部件之间的能量转换损耗小，并且可以容易地获得它们之间的阻抗匹配。 通过提供与电路基板的两个主表面相对的槽，构成两个平面介质线。 在第一平面介质线的端部设置有槽线和连接到槽线的电磁场和第一平面介质线以进行线路转换的第一线路转换导体图案，包括 一个插槽。 在包括槽的第二平面介质线的端部设置有共面线和第二线转换导体，其在与第二平面介质线成直角的方向上突出。 半导体器件被放置成在共面线和缝线上延伸。

    Dielectric resonator, dielectric filter, dielectric duplexer, and oscillator
    4.
    发明授权
    Dielectric resonator, dielectric filter, dielectric duplexer, and oscillator 失效
    介质谐振器，介质滤波器，介质双工器和振荡器

    公开(公告)号：US06172572B2

    公开(公告)日：2001-01-09

    申请号：US09319823

    申请日：1999-07-13

    申请人： Takehisa Kajikawa ,  Koichi Sakamoto ,  Sadao Yamashita

    发明人： Takehisa Kajikawa ,  Koichi Sakamoto ,  Sadao Yamashita

    IPC分类号： H03B518

    CPC分类号： H01P1/20318 ,  H01P1/2135 ,  H01P7/10 ,  H03B5/1864

    摘要： A dielectric resonator allowing size reduction and easy modulation of coupling between adjacent resonating sections and electrodes is provided. A configuration is such that electric conductors 2a and 2b having openings on two main faces of a dielectric substrate 2 are arranged so as to oppose each other. Electrodes 5 and 6 are respectively formed on one main face each of supporting members 3a and 3b, the supporting members 3a and 3b are arranged via spacers 9 so as to oppose each other and so as to be apart from each other with a predetermined spacing in the thickness direction of the dielectric substrate 2 for the dielectric substrate 2, first and second conductor plates 4a and 4b are arranged apart with a predetermined spacing from the supporting members 3a and 3b, and the dielectric substrate positioning between the openings opposing each other is used as a resonating section.

    摘要翻译： 提供了允许尺寸减小并且容易调制相邻谐振部分和电极之间的耦合的介质谐振器。 在电介质基板2的两个主面上具有开口的电导体2a，2b配置成彼此相对的结构。 电极5和6分别形成在每个支撑构件3a和3b的一个主面上，支撑构件3a和3b经由间隔件9布置成彼此相对并且以预定间隔彼此分开 电介质基板2的电介质基板2的厚度方向，第一导体板4a，第二导体板4b以与支撑部件3a，3b隔开规定的间隔配置，使用位于彼此相对的开口之间的电介质基板 作为共鸣部分。

    Oscillator and communications device
    5.
    发明授权
    Oscillator and communications device 失效
    振荡器和通信设备

    公开(公告)号：US6163688A

    公开(公告)日：2000-12-19

    申请号：US315737

    申请日：1999-05-20

    申请人： Yasutaka Fujii ,  Koichi Sakamoto ,  Sadao Yamashita ,  Kenichi Iio ,  Takehisa Kajikawa

    发明人： Yasutaka Fujii ,  Koichi Sakamoto ,  Sadao Yamashita ,  Kenichi Iio ,  Takehisa Kajikawa

    IPC分类号： H03B5/18 ,  H04B1/26 ,  H04B1/38

    CPC分类号： H03B5/1864

    摘要： An oscillator comprises a dielectric resonator, a circuit board, and an adjustment mechanism for adjusting the relative positional relationship between the dielectric resonator and the circuit board; the dielectric resonator having a dielectric substrate, electrodes provided on two opposite faces of the dielectric substrate, and electrode removal portions provided at predetermined positions on the electrodes; and the adjustment mechanism comprising screws and springs for moving the dielectric resonator.

    摘要翻译： 振荡器包括介质谐振器，电路板和用于调节介质谐振器和电路板之间的相对位置关系的调节机构; 所述介电谐振器具有电介质基板，设置在所述电介质基板的两个相对面上的电极以及设置在所述电极上的预定位置处的电极去除部; 并且该调节机构包括用于移动介质谐振器的螺钉和弹簧。

    Planar dielectric integrated circuit with line conversion conductor patterns
    7.
    发明授权
    Planar dielectric integrated circuit with line conversion conductor patterns 失效
    具有线路转换导体图案的平面介质集成电路

    公开(公告)号：US06717492B2

    公开(公告)日：2004-04-06

    申请号：US10072533

    申请日：2002-02-08

    申请人： Yohei Ishikawa ,  Koichi Sakamoto ,  Sadao Yamashita ,  Kenichi Iio

    发明人： Yohei Ishikawa ,  Koichi Sakamoto ,  Sadao Yamashita ,  Kenichi Iio

    IPC分类号： H01P710

    CPC分类号： H01P3/165 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01P3/16 ,  H01L2924/00

    摘要： A planar dielectric integrated circuit is provided such that energy conversion loss between a planar dielectric line and electronic components is small and that impedance matching between them can be easily obtained. A planar dielectric line is provided by causing two slots to oppose each other with a dielectric plate interposed in between, a slot line and line-conversion conductor patterns are provided in the end portions of the planar dielectric line, and an FET is disposed in such a manner as to be extended over the slot line.

    摘要翻译： 提供了平面介质集成电路，使得平面介质线和电子部件之间的能量转换损耗小，并且可以容易地获得它们之间的阻抗匹配。 通过使两个槽彼此相对地插入介质板来提供平面介质线，在平面介质线的端部设置槽线和线转换导体图案，并且将FET布置在其中 一种在槽线上延伸的方式。

    Planar dielectric line and integrated circuit using the same line
    10.
    发明授权
    Planar dielectric line and integrated circuit using the same line 失效
    平面介质线和集成电路采用同一条线

    公开(公告)号：US5986527A

    公开(公告)日：1999-11-16

    申请号：US832305

    申请日：1997-04-03

    申请人： Yohei Ishikawa ,  Toshiro Hiratsuka ,  Sadao Yamashita ,  Kenichi Iio

    发明人： Yohei Ishikawa ,  Toshiro Hiratsuka ,  Sadao Yamashita ,  Kenichi Iio

    IPC分类号： H01P3/00 ,  H01P3/16

    CPC分类号： H01P3/00 ,  H01P3/16

    摘要： A small and inexpensive planar dielectric line that can be easily connected to electronic parts, such as ICs, and has smaller conduction losses. The planar dielectric line includes a dielectric substrate having first and second surfaces opposedly facing each other. A first slot having a predetermined width is interposed between first and second electrodes on the first surface of the dielectric substrate. A second slot having the same width as the first slot is disposed between third and fourth electrodes on the second surface of the dielectric substrate. The first and second slots opposedly face each other. The permittivity and the thickness of the dielectric substrate are determined so that a planar electromagnetic wave can propagate in a propagation region of the substrate interposed between the first and second slots while being substantially totally reflected on the first surface of the substrate adjacent to the first slot and the second surface of the substrate near the second slot. When the permittivity and the thickness of the dielectric substrate are determined to meet the following conditions, 80% or more of the total electric field energy is confined within a region which is small enough to substantially eliminate interference with an adjacent line:(relative permittivity of dielectric substrate).gtoreq.10 (thickness "t" of dielectric substrate).gtoreq.0.3 mm. When the relative permittivity is at least 18, 90% or more of the total electric field energy is confined.

    摘要翻译： 可以容易地连接到诸如IC的电子部件的小且廉价的平面介质线，并且具有较小的传导损耗。 平面介质线包括具有彼此面对的第一和第二表面的电介质基板。 具有预定宽度的第一槽介于介质基板的第一表面上的第一和第二电极之间。 具有与第一槽相同宽度的第二槽设置在电介质基板的第二表面上的第三和第四电极之间。 第一和第二槽相对地面对。 确定电介质基板的介电常数和厚度，使得平面电磁波可以在介于第一和第二槽之间的基板的传播区域中传播，同时基本上完全反射在与第一槽相邻的基板的第一表面上 以及在第二槽附近的衬底的第二表面。 当介电基片的介电常数和厚度确定为满足以下条件时，总电场能量的80％以上被限制在足够小的区域，以便基本上消除与相邻线的干涉：（相对介电常数 介电基片）> = 10（介电基片的厚度“t”）= 0.3mm。 当相对介电常数至少为18时，限制了总电场能量的90％以上。