公开(公告)号：US20100053823A1

公开(公告)日：2010-03-04

申请号：US12200181

申请日：2008-08-28

申请人： Masayoshi Iwayama ,  Keiji Hosotani ,  Takeshi Kajiyama ,  Yoshiaki Asao

发明人： Masayoshi Iwayama ,  Keiji Hosotani ,  Takeshi Kajiyama ,  Yoshiaki Asao

IPC分类号： G11B5/33

CPC分类号： H01F10/3263 ,  B82Y25/00 ,  B82Y40/00 ,  G01R33/093 ,  G11C11/161 ,  H01F41/302 ,  H01L43/08 ,  H01L43/12

摘要： A magnetoresistive element includes a stack formed by sequentially stacking a first fixed layer in which a magnetization direction is fixed, a first nonmagnetic layer, a free layer in which a magnetization direction is changeable, a second nonmagnetic layer, and a second fixed layer in which a magnetization direction is fixed, a first circumferential wall provided on the second nonmagnetic layer in contact with a circumferential surface of the second fixed layer to surround the second fixed layer, and made of an insulator, and a second circumferential wall provided on the first nonmagnetic layer in contact with a circumferential surface of the free layer to surround the free layer, and made of an insulator.

摘要翻译： 磁阻元件包括通过顺序层叠其中固定有磁化方向的第一固定层，第一非磁性层，磁化方向可变的自由层，第二非磁性层和第二固定层而形成的叠层，其中 磁化方向是固定的，设置在第二非磁性层上的与第二固定层的圆周表面接触以围绕第二固定层并由绝缘体制成的第一周向壁和设置在第一非磁性层上的第二周向壁 层与自由层的周向表面接触以包围自由层，并由绝缘体制成。

公开(公告)号：US20090250735A1

公开(公告)日：2009-10-08

申请号：US12408553

申请日：2009-03-20

申请人： Yoshiaki Asao

发明人： Yoshiaki Asao

IPC分类号： H01L27/115

CPC分类号： H01L27/228 ,  G11C11/1655 ,  G11C11/1659 ,  G11C13/00 ,  G11C13/0004 ,  G11C2213/79 ,  H01L27/24

摘要： A semiconductor memory according to an embodiment of the present invention including first and second adjacent bit lines extending in a first direction and provided in the same interconnect layer, an active provided in a memory cell array, a first and second adjacent word lines extending in a second direction intersecting the first direction, a cell group having two transistor provided in the active region and two resistive storage element, wherein the active region has a striped structure, and extends from one end of the memory cell array to the other.

摘要翻译： 根据本发明的实施例的半导体存储器包括在第一方向上延伸并且设置在相同的互连层中的第一和第二相邻位线，设置在存储单元阵列中的有源，第一和第二相邻字线 与第一方向相交的第二方向，具有设置在有源区中的两个晶体管的单元组和两个电阻存储元件，其中有源区具有条纹结构，并且从存储单元阵列的一端延伸到另一个。

公开(公告)号：US20080204944A1

公开(公告)日：2008-08-28

申请号：US12100969

申请日：2008-04-10

申请人： Hisanori Aikawa ,  Tomomasa Ueda ,  Tatsuya Kishi ,  Takeshi Kajiyama ,  Yoshiaki Asao ,  Hiroaki Yoda

发明人： Hisanori Aikawa ,  Tomomasa Ueda ,  Tatsuya Kishi ,  Takeshi Kajiyama ,  Yoshiaki Asao ,  Hiroaki Yoda

IPC分类号： G11B5/33

CPC分类号： G11B5/39

摘要： It is possible to reduce writing current without causing fluctuation of the writing characteristic. A magnetic memory includes: a magnetoresistance effect element having a magnetization pinned layer whose magnetization direction is pinned, a storage layer whose magnetization direction is changeable, and a non-magnetic layer provided between the magnetization pinned layer and the storage layer; and a first wiring layer which is electrically connected to the magnetoresistance effect element and extends in a direction substantially perpendicular to a direction of an easy magnetization axis of the storage layer, an end face of the magnetoresistance effect element substantially perpendicular to the direction of the easy magnetization axis of the storage layer and an end face of the first wiring layer substantially perpendicular to the direction of the easy magnetization axis being positioned on the same plane.

摘要翻译： 可以减小写入电流而不引起写入特性的波动。 磁存储器包括：磁阻效应元件，具有其磁化方向被钉扎的磁化钉扎层，其磁化方向可变的存储层和设置在磁化钉扎层与存储层之间的非磁性层; 以及第一布线层，其电连接到所述磁阻效应元件并且沿着与所述存储层的容易磁化轴方向大致垂直的方向延伸，所述磁阻效应元件的端面基本上垂直于所述容易的方向 存储层的磁化轴和基本上垂直于易磁化轴的方向的第一布线层的端面位于同一平面上。

公开(公告)号：US07333359B2

公开(公告)日：2008-02-19

申请号：US10419873

申请日：2003-04-22

申请人： Yoshiaki Asao ,  Yoshihisa Iwata ,  Yoshiaki Saito ,  Hiroaki Yoda ,  Tomomasa Ueda ,  Minoru Amano ,  Shigeki Takahashi ,  Tatsuya Kishi

发明人： Yoshiaki Asao ,  Yoshihisa Iwata ,  Yoshiaki Saito ,  Hiroaki Yoda ,  Tomomasa Ueda ,  Minoru Amano ,  Shigeki Takahashi ,  Tatsuya Kishi

IPC分类号： G11C11/00

CPC分类号： B82Y25/00 ,  G11C11/16 ,  H01F10/06 ,  H01F10/3254

摘要： A write word line is disposed right under a MTJ element. The write word line extends in an X direction, and side and lower surfaces of the write word line are coated with a hard magnetic material and yoke material. The hard magnetic material is magnetized by a surplus current passed through the write word line, and a characteristic of the MTJ element is corrected by residual magnetization. A data selection line (read/write bit line) is disposed right on the MTJ element. The data selection line extends in a Y direction intersecting with the X direction, and a part of the surface of the data selection line is coated with the yoke material.

摘要翻译： 写字线被放置在MTJ元素的正下方。 写字线在X方向上延伸，并且写字线的侧表面和下表面涂覆有硬磁材料和轭材料。 硬磁材料被通过写入字线的剩余电流磁化，并且通过剩余磁化来校正MTJ元件的特性。 数据选择线（读/写位线）设置在MTJ元件上。 数据选择线在与X方向相交的Y方向上延伸，并且数据选择线的表面的一部分涂覆有轭材料。

公开(公告)号：US07277318B2

公开(公告)日：2007-10-02

申请号：US11213855

申请日：2005-08-30

申请人： Hiroaki Yoda ,  Hisanori Aikawa ,  Tomomasa Ueda ,  Tatsuya Kishi ,  Takeshi Kajiyama ,  Yoshiaki Asao

发明人： Hiroaki Yoda ,  Hisanori Aikawa ,  Tomomasa Ueda ,  Tatsuya Kishi ,  Takeshi Kajiyama ,  Yoshiaki Asao

IPC分类号： G11C11/00

CPC分类号： H01L43/12 ,  G11C11/15

摘要： A write wiring for writing information in an MTJ device is covered with a magnetic layer. The magnetic layer has a structure in which the growing direction of columnar grains is 30° or less from the normal-line direction of sidewalls, a structure in which grains are deposited of sidewalls, a structure in which grains are deposited like a layer, or a structure in which grains are amorphously deposited.

摘要翻译： 用于在MTJ设备中写入信息的写入线覆盖有磁性层。 磁性层具有其中柱状晶体的生长方向从侧壁的法线方向为30°以下的结构，其中侧壁成为晶粒的结构，其中晶粒沉积成层的结构，或 其中晶粒被无定形沉积的结构。

公开(公告)号：US20050281079A1

公开(公告)日：2005-12-22

申请号：US11213855

申请日：2005-08-30

申请人： Hiroaki Yoda ,  Hisanori Aikawa ,  Tomomasa Ueda ,  Tatsuya Kishi ,  Takeshi Kajiyama ,  Yoshiaki Asao

发明人： Hiroaki Yoda ,  Hisanori Aikawa ,  Tomomasa Ueda ,  Tatsuya Kishi ,  Takeshi Kajiyama ,  Yoshiaki Asao

IPC分类号： H01L27/105 ,  G11C11/15 ,  H01L21/8246 ,  H01L43/08 ,  G11C11/00

CPC分类号： H01L43/12 ,  G11C11/15

摘要： A write wiring for writing information in an MTJ device is covered with a magnetic layer. The magnetic layer has a structure in which the growing direction of columnar grains is 300 or less from the normal-line direction of sidewalls, a structure in which grains are deposited like a layer, or a structure in which grains are amorphously deposited.

摘要翻译： 用于在MTJ设备中写入信息的写入线覆盖有磁性层。 磁性层具有如下结构：柱状晶粒的生长方向与侧壁的法线方向成为300°以下，其中晶粒沉积成层的结构或其中晶粒非晶态沉积的结构。

公开(公告)号：US20050274984A1

公开(公告)日：2005-12-15

申请号：US11152411

申请日：2005-06-15

申请人： Keiji Hosotani ,  Yoshiaki Asao ,  Yoshiaki Saito ,  Minoru Amano ,  Shigeki Takahashi ,  Tatsuya Kishi ,  Yoshihisa Iwata

发明人： Keiji Hosotani ,  Yoshiaki Asao ,  Yoshiaki Saito ,  Minoru Amano ,  Shigeki Takahashi ,  Tatsuya Kishi ,  Yoshihisa Iwata

IPC分类号： H01L27/105 ,  H01L21/768 ,  H01L21/8246 ,  H01L27/22 ,  H01L43/08 ,  H01L27/10

CPC分类号： H01L27/228 ,  B82Y10/00 ,  H01L21/76895 ,  H01L43/08

摘要： A semiconductor integrated circuit device includes a cell transistor; a bit line provided above the cell transistor; a magnetoresistive element provided above the bit line, a first end portion of the magnetoresistive element being electrically connected to the bit line; an intracell local interconnection provided above the magnetoresistive element, the intracell local interconnection coupling one of source and drain regions of the cell transistor to a second end portion of the magnetoresistive element; and a write word line provided above the intracell local interconnection, a portion between the write word line and the intracell local interconnection being filled with an insulator alone.

公开(公告)号：US20050199925A1

公开(公告)日：2005-09-15

申请号：US10847384

申请日：2004-05-18

申请人： Takeshi Kajiyama ,  Tomomasa Ueda ,  Tatsuya Kishi ,  Hisanori Aikawa ,  Masatoshi Yoshikawa ,  Yoshiaki Asao ,  Hiroaki Yoda

发明人： Takeshi Kajiyama ,  Tomomasa Ueda ,  Tatsuya Kishi ,  Hisanori Aikawa ,  Masatoshi Yoshikawa ,  Yoshiaki Asao ,  Hiroaki Yoda

IPC分类号： H01L27/105 ,  G11B5/33 ,  G11C11/14 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/22 ,  H01L43/08 ,  H01L43/12

CPC分类号： G11C11/16 ,  B82Y10/00 ,  H01L27/228 ,  H01L43/08 ,  H01L43/12

摘要： A magnetic random access memory concerning an example of the present invention comprises a magneto resistive element, a first insulating layer which covers side surfaces of the magneto resistive element, a second insulating layer which is arranged on the first insulating layer and has a first groove on the magneto resistive element, a write line which fills the first groove and is connected with the magneto resistive element, and a third insulating layer which is arranged between the first and second insulating layers except a bottom portion of the first groove and has an etching selection ratio with respect to at least the first and second insulating layers.

公开(公告)号：US20050141262A1

公开(公告)日：2005-06-30

申请号：US10845403

申请日：2004-05-14

申请人： Takashi Yamada ,  Fumio Horiguchi ,  Takashi Ohsawa ,  Yoshihisa Iwata ,  Yoshiaki Asao

发明人： Takashi Yamada ,  Fumio Horiguchi ,  Takashi Ohsawa ,  Yoshihisa Iwata ,  Yoshiaki Asao

IPC分类号： H01L27/108 ,  G11C11/24 ,  G11C11/404 ,  H01L21/8239 ,  H01L21/8242 ,  H01L21/84 ,  H01L27/105 ,  H01L27/12

CPC分类号： H01L27/108 ,  H01L21/84 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/1203 ,  H01L29/7841 ,  H01L29/785

摘要： A semiconductor memory device includes a plurality of MIS transistors arranged at intersections of first word lines and bit lines formed on an SOI substrate and each configuring a memory cell. Each of the plurality of MIS transistors includes a channel body formed in a semiconductor layer on an insulating film and set in an electrically floating state, a first extension region formed in contact with the channel body in the semiconductor layer and arranged in a first word line direction, a gate insulating film formed on the channel body, a gate electrode formed on the gate insulating film and electrically connected to a corresponding one of the first word lines, and source and drain regions separately formed in a bit line direction in the semiconductor layer to sandwich the channel body.

摘要翻译： 半导体存储器件包括多个MIS晶体管，其布置在形成在SOI衬底上的第一字线和位线的交点处，并且每个配置存储器单元。 多个MIS晶体管中的每一个包括形成在绝缘膜上的半导体层中并设置为电浮置状态的沟道体，与半导体层中的沟道体接触形成并布置在第一字线中的第一延伸区域 形成在沟道体上的栅极绝缘膜，形成在栅极绝缘膜上并电连接到第一字线中的相应一个的栅极电极以及在半导体层中分别形成在位线方向上的源极和漏极区域 夹住通道体。

公开(公告)号：US06909130B2

公开(公告)日：2005-06-21

申请号：US10704552

申请日：2003-11-12

申请人： Hiroaki Yoda ,  Tomomasa Ueda ,  Hisanori Aikawa ,  Tatsuya Kishi ,  Takeshi Kajiyama ,  Yoshiaki Asao

发明人： Hiroaki Yoda ,  Tomomasa Ueda ,  Hisanori Aikawa ,  Tatsuya Kishi ,  Takeshi Kajiyama ,  Yoshiaki Asao

IPC分类号： G11C11/15 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L29/76 ,  H01L43/08

CPC分类号： G11C11/16 ,  B82Y10/00 ,  H01L27/228

摘要： A recording layer of an MTJ element is constituted by using a high crystal magnetic anisotropic material. A write wiring used to write data into the MTJ element is covered with a magnetic layer, and the write wiring and the magnetic layer are exchange-coupled with each other. A sum of a magnetic volume of the magnetic layer at a part opposed to the recording layer of the MTJ element and that of the recording layer is set smaller than a magnetic volume of the magnetic layer at any other part.

摘要翻译： MTJ元件的记录层通过使用高结晶磁性各向异性材料构成。 用于将数据写入MTJ元件的写入线被磁性层覆盖，并且写入布线和磁性层彼此交换耦合。 在与MTJ元件和记录层的记录层相对的部分处的磁性层的磁体积的总和设定为小于任何其它部分的磁性层的磁性体积。