Differential latch and applications thereof
    21.
    发明授权
    Differential latch and applications thereof 失效
    差分锁存器及其应用

    公开(公告)号:US06693476B1

    公开(公告)日:2004-02-17

    申请号:US10201152

    申请日:2002-07-23

    申请人: Tsung-Hsien Lin

    发明人: Tsung-Hsien Lin

    IPC分类号: H03K3289

    摘要: A differential latch includes a sample transistor section, a hold transistor section, a 1st gating circuit and a 2nd gating circuit. The sample transistor section is operably coupled to sample, when coupled to a supply voltage (e.g., VDD and VSS) a differential input signal. The hold transistor section is operably coupled to latch, when coupled to the supply voltage, the sampled differential input to produce a latched differential signal. The 1st gating circuit is operable to couple the sampled transistor section to the supply voltage in accordance with a 1st clocking logic operation and a 2nd clocking logic operation. The 2nd gating circuit is operable to couple the hold transistor section to the supply voltage in accordance with a 3rd clocking logic operation and a 4th clocking logic operation.

    摘要翻译: 差分锁存器包括采样晶体管部分,保持晶体管部分,第1门控电路和第2门控电路。 当与电源电压(例如,VDD和VSS)耦合到差分输入信号时,采样晶体管部分可操作地耦合到采样。 当耦合到电源电压时,保持晶体管部分可操作地耦合到锁存器,以产生锁存的差分信号。 第一门控电路可操作以根据时钟逻辑运算和第二时钟逻辑运算将采样的晶体管部分耦合到电源电压。 第二门控电路可操作以根据3时钟逻辑运算和4时钟逻辑运算将保持晶体管部分耦合到电源电压。

    Phase locked loop capable of fast locking
    23.
    发明授权
    Phase locked loop capable of fast locking 有权
    锁相环能够快速锁定

    公开(公告)号:US08437441B2

    公开(公告)日:2013-05-07

    申请号:US12506023

    申请日:2009-07-20

    IPC分类号: H03D3/24

    摘要: A phase locked loop includes a voltage controlled oscillator operable to generate an output signal corresponding to a reference signal in response to a control voltage signal outputted by a filter in response to a current signal, and a variable frequency divider operable to perform frequency division on the output signal using a variable divisor so as to generate a divided feedback signal. A charge pump outputs the current signal in response to a phase detecting output from a phase/frequency detector indicating phases of the divided feedback signal and the reference signal. A phase error comparator outputs, in accordance with the phase detecting output, a digital output indicating whether the divided feedback signal lags or leads the reference signal and further indicating a phase difference between the divided feedback signal and the reference signal. The variable frequency divider determines a value of the variable divisor in accordance with the digital output to reduce the phase difference between the divided feedback signal and the reference signal.

    摘要翻译: 锁相环包括压控振荡器,其可操作以响应于由电流信号响应由滤波器输出的控制电压信号而产生对应于参考信号的输出信号;以及可变分频器,用于对 输出信号,以产生分频的反馈信号。 响应于来自相位/频率检测器的相位检测输出,电荷泵输出指示分频反馈信号和参考信号的相位的电流信号。 相位误差比较器根据相位检测输出输出指示分频反馈信号是否滞后或引导参考信号的数字输出,并进一步指示分频反馈信号与参考信号之间的相位差。 可变分频器根据数字输出确定可变因数的值,以减小分频反馈信号与参考信号之间的相位差。

    PIXEL STRUCTURE AND DISPLAY PANEL
    24.
    发明申请
    PIXEL STRUCTURE AND DISPLAY PANEL 审中-公开
    像素结构和显示面板

    公开(公告)号:US20120176300A1

    公开(公告)日:2012-07-12

    申请号:US13346671

    申请日:2012-01-09

    申请人: Tsung-Hsien Lin

    发明人: Tsung-Hsien Lin

    IPC分类号: G09G3/36

    摘要: A pixel structure and a display panel are provided. The pixel structure is disposed on a substrate having a transmissive display region and a reflective display region and includes a scan line, a data line, an active device, a first electrode, a second electrode, and an alignment layer. The first electrode has first stripe portions located in the transmissive display region and second stripe portions located in the reflective display region. Each first stripe portion and each second stripe portion are perpendicular arranged. One of the first electrode and the second electrode is electrically connected to the active device and the other of the first electrode and the second electrode is connected to a common voltage. The alignment layer covers the first electrode and the second electrode and has an alignment direction intersecting the second direction in 45° to 85°.

    摘要翻译: 提供像素结构和显示面板。 像素结构设置在具有透射显示区域和反射显示区域的基板上,并且包括扫描线,数据线,有源器件,第一电极,第二电极和取向层。 第一电极具有位于透射显示区域中的第一条纹部分和位于反射显示区域中的第二条纹部分。 每个第一条纹部分和每个第二条纹部分垂直布置。 第一电极和第二电极中的一个电连接到有源器件,并且第一电极和第二电极中的另一个连接到公共电压。 取向层覆盖第一电极和第二电极,并且具有与第二方向交叉的取向方向为45°〜85°。

    Reflective liquid crystal display panel capable of being photo-programmed and restored by polarized lights
    25.
    发明授权
    Reflective liquid crystal display panel capable of being photo-programmed and restored by polarized lights 有权
    反光液晶显示面板,能够通过偏光灯进行光编程和恢复

    公开(公告)号:US08174630B2

    公开(公告)日:2012-05-08

    申请号:US11459934

    申请日:2006-07-26

    CPC分类号: G02F1/133553 G02F1/133362

    摘要: A reflective liquid crystal display panel capable of performing data programming and/or data erasing via a polarized light is provided. The reflective liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer, a transflective film, a retarder and a polarizer. The second substrate is disposed over the first substrate. The liquid crystal layer is located between the first substrate and the second substrate and an optical aligned material is doped in the liquid crystal layer. The transflective film is disposed below the first substrate, and the transflective film allows the polarized light to pass through, so that the orientation of the optical aligned material doped liquid crystal layer can be controlled by the polarized light. The transflective film reflects external light source. The retarder is disposed between the transflective film and the first substrate. The polarizer is disposed on the second substrate.

    摘要翻译: 提供能够经由偏振光执行数据编程和/或数据擦除的反射型液晶显示面板。 反射型液晶显示面板包括第一基板,第二基板,液晶层,透反射膜,延迟器和偏振器。 第二基板设置在第一基板上。 液晶层位于第一基板和第二基板之间,并且在液晶层中掺杂光学取向的材料。 半透反射膜设置在第一基板的下方,半透反射膜允许偏振光通过,从而可以通过偏振光来控制光学对准材料掺杂的液晶层的取向。 半透反射膜反射外部光源。 延迟器设置在透反射膜和第一基板之间。 偏振器设置在第二基板上。

    Modulator with loop-delay compensation
    27.
    发明授权
    Modulator with loop-delay compensation 有权
    具有回路延迟补偿的调制器

    公开(公告)号:US08072362B2

    公开(公告)日:2011-12-06

    申请号:US12632789

    申请日:2009-12-07

    IPC分类号: H03M3/00

    CPC分类号: H03M3/37 H03M3/43 H03M3/454

    摘要: A modulator is constructed with a loop-delay compensation. A delta-sigma modulator generates a quantization code, and a digital compensation filter receives the quantization code and outputs a digital code. The digital compensation filter then feeds the digital code back to the delta-sigma modulator.

    摘要翻译: 采用环路延迟补偿构成调制器。 Δ-Σ调制器产生量化代码,数字补偿滤波器接收量化代码并输出数字代码。 然后,数字补偿滤波器将数字代码反馈回delta-Σ调制器。

    BACKLIGHT MODULE
    28.
    发明申请
    BACKLIGHT MODULE 有权
    背光模组

    公开(公告)号:US20110216527A1

    公开(公告)日:2011-09-08

    申请号:US12793692

    申请日:2010-06-04

    IPC分类号: G02F1/13357

    摘要: A backlight module includes a back plate, a plurality of lamps, a lamp fixing base, and a diffusion plate. The back plate has a cavity. The lamps are disposed on or above the back plate. The lamp fixing base is disposed on the back plate for fixing the lamps. The lamp fixing base has a supporting portion extending along a direction away from the back plate. An orthogonal projection of the supporting portion on the back plate is within a boundary of the cavity. The diffusion plate is disposed above or over the back plate, and the supporting portion is suitable for supporting the diffusion plate.

    摘要翻译: 背光模块包括背板,多个灯,灯固定底座和扩散板。 背板有一个空腔。 灯设置在背板上或上面。 灯固定座设置在背板上用于固定灯。 灯固定座具有沿远离背板的方向延伸的支撑部。 背板上的支撑部分的正交突起在空腔的边界内。 扩散板设置在背板的上方或上方,支撑部适合于支撑扩散板。

    Bandpass delta-sigma modulator
    29.
    发明授权
    Bandpass delta-sigma modulator 有权
    带通Δ-Σ调制器

    公开(公告)号:US08004437B2

    公开(公告)日:2011-08-23

    申请号:US12632793

    申请日:2009-12-07

    IPC分类号: H03M3/00

    CPC分类号: H03M3/344 H03M3/408 H03M3/454

    摘要: A bandpass delta-sigma modulator is formed to include a bandpass filtering circuit that bandpass filters an input signal. An analog-to-digital converter (ADC) receives output of the bandpass filtering circuit and generates an output quantization code. A digital filter receives the output quantization code. A digital-to-analog converter (DAC) receives output of the digital filter and scales the value of the output quantization code by DAC coefficients to the bandpass filtering circuit.

    摘要翻译: 形成带通Δ-Δ调制器以包括带通滤波输入信号的带通滤波电路。 模数转换器(ADC)接收带通滤波电路的输出并产生输出量化码。 数字滤波器接收输出量化码。 数模转换器(DAC)接收数字滤波器的输出,并通过DAC系数将输出量化码的值缩放到带通滤波电路。

    METHOD OF REPAIRING A MOLDING DIE FOR MOLDING GLASS
    30.
    发明申请
    METHOD OF REPAIRING A MOLDING DIE FOR MOLDING GLASS 审中-公开
    修理模制玻璃模具的方法

    公开(公告)号:US20110011732A1

    公开(公告)日:2011-01-20

    申请号:US12893238

    申请日:2010-09-29

    IPC分类号: B23P6/00 C23C14/34

    摘要: The present invention provides a method of repairing a molding die for molding glass, the molding die for molding glass comprising a base member, a first buffer layer on the base member, which is made of titanium or any material which is easily attacked by a first attack solution, wherein the first attack solution includes hydrofluoric acid, a protective film on the first buffer layer; the method comprising the steps of using the first attack solution to remove the first buffer layer that causes no damage on the base member, and then operating a sputtering process to build a new first buffer layer and a new protective layer on the base member.

    摘要翻译: 本发明提供一种修复玻璃成型用模具的方法,所述成型用模具用于成型玻璃,所述成型模具包括基材,所述基材上的第一缓冲层,所述第一缓冲层由钛或任何容易被第一 攻击方案,其中所述第一攻击方案包括氢氟酸,所述第一缓冲层上的保护膜; 该方法包括以下步骤:使用第一攻击解决方案去除不会对基底构件造成损坏的第一缓冲层,然后操作溅射工艺以在基底构件上构建新的第一缓冲层和新的保护层。