中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

39 records (took 0.041 seconds)

    IRREDUCIBLE MODULES
    21.
    发明申请
    IRREDUCIBLE MODULES 审中-公开
    不可磨损的模块

    公开(公告)号：US20170075961A1

    公开(公告)日：2017-03-16

    申请号：US15360163

    申请日：2016-11-23

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： William J. Lewis

    IPC: G06F17/30 ,  G06F7/10 ,  G06F7/08

    CPC classification number: G06F16/24575 ,  G06F7/08 ,  G06F7/10 ,  G06F8/30 ,  G06F8/4434 ,  G06F16/2282 ,  G06F16/2379

    Abstract: An approach to generating irreducible modules. The approach includes a method that includes receiving, by at least one computing device, data associated with a specification. The method includes defining, by the at least one computing device, a pattern on the received data. The pattern reduces a set of rules into a single condition. The method includes generating, by the at least one computing device, an irreducible module based on the pattern. The irreducible module has one output dependent variable and is associated with a data flow application.

    Abstract translation: 一种产生不可约模块的方法。 该方法包括一种方法，其包括由至少一个计算设备接收与规范相关联的数据。 该方法包括由至少一个计算设备定义接收到的数据上的模式。 该模式将一组规则减少为单个条件。 该方法包括由至少一个计算设备基于该模式生成不可约模块。 不可约模块具有一个输出因变量并与数据流应用相关联。

    Invariant design image capture device
    23.
    发明授权
    Invariant design image capture device 有权
    不变设计图像捕获设备

    公开(公告)号：US09224024B2

    公开(公告)日：2015-12-29

    申请号：US13294791

    申请日：2011-11-11

    Applicant: Edward C. Bremer ,  Chen Feng

    Inventor： Edward C. Bremer ,  Chen Feng

    IPC: G06K7/10 ,  G06F7/10

    CPC classification number: G06K7/10831 ,  G06F7/10 ,  G06K7/10

    Abstract: An indicia reading terminal for reading of a decodable indicia is provided wherein the indicia reading terminal includes an image sensor integrated circuit comprising an image sensor having a plurality of pixels; a memory for storing image data, and a unit for processing the image data for attempting to decode decodable indicia represented in the image data; and an optical system, including a lens assembly and at least a first aperture and a second aperture, the second aperture being smaller than the first aperture. The lens assembly comprises one or more lens elements. The first aperture is disposed in the lens assembly, and the second aperture is disposed at a distal end of the optical system, adjacent to the lens assembly.

    Abstract translation: 提供了一种用于读取可解码标记的标记读取终端，其中标记读取终端包括图像传感器集成电路，该图像传感器集成电路包括具有多个像素的图像传感器; 用于存储图像数据的存储器，以及用于处理图像数据以尝试对图像数据中表示的可解码标记进行解码的单元; 以及包括透镜组件和至少第一孔径和第二孔径的光学系统，所述第二孔径小于所述第一孔径。 透镜组件包括一个或多个透镜元件。 第一孔设置在透镜组件中，第二孔设置在光学系统的远端处，与透镜组件相邻。

    Transactional memory that performs an ALUT 32-bit lookup operation
    24.
    发明授权
    Transactional memory that performs an ALUT 32-bit lookup operation 有权
    执行ALUT 32位查找操作的事务内存

    公开(公告)号：US08972668B2

    公开(公告)日：2015-03-03

    申请号：US13675309

    申请日：2012-11-13

    Applicant: Gavin J. Stark

    Inventor： Gavin J. Stark

    IPC: G06F12/00 ,  G06F9/46 ,  G06F9/34

    CPC classification number: G06F13/287 ,  G06F7/10 ,  G06F9/34 ,  G06F9/467 ,  G06F12/00 ,  G06F13/00 ,  G06F13/4234 ,  G06F17/30 ,  Y02D10/14 ,  Y02D10/151

    Abstract: A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a memory address, a starting bit position, and a mask size. In response to the command, the TM pulls an input value (IV). The memory address is used to read a word containing multiple result values (RVs) and multiple key values from memory. Each key value indicates a single RV to be output by the TM. A selecting circuit within the TM uses the starting bit position and mask size to select a portion of the IV. The portion of the IV is a key selector value. A key value is selected based upon the key selector value. A RV is selected based upon the key value. The key value is selected by a key selection circuit. The RV is selected by a result value selection circuit.

    Abstract translation: 事务存储器（TM）从处理器接收总线上的查找命令。 该命令包括存储器地址，起始位位置和掩码大小。 响应该命令，TM拉动输入值（IV）。 存储器地址用于从存储器读取包含多个结果值（RV）和多个键值的单词。 每个键值表示TM输出的单个RV。 TM内的选择电路使用起始位位置和掩码大小来选择IV的一部分。 IV的部分是关键选择器值。 基于键选择器值选择键值。 基于键值选择RV。 键值由键选择电路选择。 RV由结果值选择电路选择。

    SMART WIDGETS
    25.
    发明申请
    SMART WIDGETS 有权

    公开(公告)号：US20110191316A1

    公开(公告)日：2011-08-04

    申请号：US12700572

    申请日：2010-02-04

    Applicant: Wei-Cheng Lai ,  Su-Lin Wu

    Inventor： Wei-Cheng Lai ,  Su-Lin Wu

    IPC: G06F7/10 ,  G06F17/30

    CPC classification number: G06F7/10 ,  G06F17/30

    Abstract: According to some example embodiments, a method includes based, at least in part, on one or more signals representative of user-defined content, assessing the user-defined content and storing one or more signals representative of a result of the assessment of the user-defined content. The method further includes selecting one or more widgets for presentation in combination with other content associated with the user-defined content, the selecting being based at least in part on the assessment of the user-defined content.

    Abstract translation: 根据一些示例实施例，一种方法至少部分地基于代表用户定义的内容的一个或多个信号，评估用户定义的内容并且存储表示用户的评估结果的一个或多个信号 定义的内容。 该方法还包括选择与用户定义的内容相关联的其他内容一起呈现的一个或多个小部件，该选择至少部分地基于用户定义的内容的评估。

    PERSONAL TOKEN HAVING ENHANCED COMMUNICATION ABILITIES FOR A HOSTED APPLICATION
    26.
    发明申请
    PERSONAL TOKEN HAVING ENHANCED COMMUNICATION ABILITIES FOR A HOSTED APPLICATION 有权
    具有加强应用的增强通信能力的个人电话

    公开(公告)号：US20100178945A1

    公开(公告)日：2010-07-15

    申请号：US12528746

    申请日：2008-02-28

    Applicant: Francois Millet ,  Sylvain Chafer ,  Jan Nemec

    Inventor： Francois Millet ,  Sylvain Chafer ,  Jan Nemec

    IPC: H04W4/12

    CPC classification number: G06F7/10 ,  G06Q20/341 ,  G06Q20/3552 ,  G06Q20/3574 ,  G07F7/1008 ,  G08C2201/42 ,  H04W4/14 ,  H04W88/02

    Abstract: The invention relates to a personal token for a mobile telecommunication network, hosting application software. The personal token is operable to receive an over-the-air SMS message encapsulating commands directed to the application, open the SMS and extract the commands from the SMS. The steps of opening the SMS and extracting the commands from the SMS are performed by a software entity in the personal token which is distinct from the application, so that the software entity initiates transmission of the extracted commands to the application.

    Abstract translation: 本发明涉及用于移动电信网络的个人令牌，其托管应用软件。 个人令牌可操作以接收封装指向应用程序的命令的空中SMS消息，打开SMS并从SMS中提取命令。 打开SMS并从SMS中提取命令的步骤由与应用程序不同的个人令牌中的软件实体执行，使得软件实体发起提取的命令到应用程序的传输。

    Elastic store circuit with vernier clock delay
    28.
    发明授权
    Elastic store circuit with vernier clock delay 有权
    具有游标时钟延迟的弹性存储电路

    公开(公告)号：US06629251B1

    公开(公告)日：2003-09-30

    申请号：US09420983

    申请日：1999-10-20

    Applicant: Walker Edward Anderson ,  Thomas Gordon Palkert ,  Robert S. Tepper

    Inventor： Walker Edward Anderson ,  Thomas Gordon Palkert ,  Robert S. Tepper

    IPC: G06F112

    CPC classification number: H04J3/062 ,  G06F1/06 ,  G06F7/10

    Abstract: An elastic store circuit using a first in/first out buffer (FIFO) to accurately delay and manipulate a waveform using the write (WR) and read (RD) clocks is provided. The FIFO delays data by, first, reading the input data at the WR clock rate. Then, the data exits the FIFO in response to the RD clock. Large delays are accomplished by changing the relationship between the WR and RD clocks in whole clock intervals. Delays and adjustments of less than a whole clock interval are accomplished by changing the phase relationship of the RD clock with respect to the WR clock. The present invention generates the WR and RD clocks through synthesis using a lower frequency reference clock. The RD phase change results from introducing a phase change into the reference clock driving the RD clock synthesizer. A method of introducing precise delays through phase control of the WR and RD clocks is also provided.

    Abstract translation: 提供了使用第一进/出出缓冲器（FIFO）来使用写（WR）和读（RD）时钟精确地延迟和操纵波形的弹性存储电路。 FIFO通过以下步骤延迟数据，首先以WR时钟速率读取输入数据。 然后，数据将响应于RD时钟退出FIFO。 通过在整个时钟间隔内改变WR和RD时钟之间的关系来实现大的延迟。 通过改变RD时钟相对于WR时钟的相位关系来实现小于整个时钟间隔的延迟和调整。 本发明通过使用较低频率参考时钟的合成产生WR和RD时钟。 RD相位变化是由将相变引入驱动RD时钟合成器的参考时钟引起的。 还提供了通过WR和RD时钟的相位控制引入精确延迟的方法。

Patent Agency Ranking