公开(公告)号：US20130104389A1

公开(公告)日：2013-05-02

申请号：US13718415

申请日：2012-12-18

Applicant: Masaki YONEDA

Inventor： Masaki YONEDA

IPC: H01C17/00 ,  H01C17/28

CPC classification number: H01C17/006 ,  H01C1/148 ,  H01C7/003 ,  H01C17/28 ,  H01C17/281 ,  H01C17/288 ,  Y10T29/49082 ,  Y10T29/49101

Abstract: A method of manufacturing a chip resistor includes the following steps. A resistor layer is formed on an obverse surface of a material substrate. A plurality of substrate sections are defined in the material substrate by forming, in the obverse surface of the material substrate, a plurality of first grooves each of which is elongated in a first direction. A conductor layer is formed in each of the first grooves. The substrate sections are cut along lines extending in a second direction different from the first direction.

Abstract translation: 制造片式电阻器的方法包括以下步骤。 在材料基板的正面上形成电阻层。 通过在材料基板的正面中形成多个在第一方向上被拉长的多个第一凹槽，在材料基板中形成多个基板部分。 导体层形成在每个第一凹槽中。 沿着沿与第一方向不同的第二方向延伸的线切割衬底部分。

公开(公告)号：US20130091696A1

公开(公告)日：2013-04-18

申请号：US13689928

申请日：2012-11-30

Applicant: Vishay Dale Electronics, Inc.

Inventor： Clark L. Smith ,  Todd L. Wyatt ,  Thomas L. Bertsch ,  Rodney J. Brune

IPC: H01C17/28

CPC classification number: H01C17/28 ,  H01C1/084 ,  H01C1/14 ,  H01C7/003 ,  H01C17/006 ,  Y10T29/49082 ,  Y10T29/49101

Abstract: A metal strip resistor is provided with a resistive element disposed between a first termination and a second termination. The resistive element, first termination, and second termination form a substantially flat plate. A thermally conductive and electrically non-conductive thermal interface material such as a thermally conductive adhesive is disposed between the resistive element and first and second heat pads that are placed on top of the resistive element and adjacent to the first and second terminations, respectively.

Abstract translation: 金属带状电阻器设置有设置在第一端接和第二端接之间的电阻元件。 电阻元件，第一端接和第二端接件形成基本平坦的板。 导电和非导电的热界面材料例如导热粘合剂设置在电阻元件和分别放置在电阻元件的顶部上并且与第一和第二端子相邻的第一和第二加热垫之间。

公开(公告)号：US08354912B2

公开(公告)日：2013-01-15

申请号：US12839888

申请日：2010-07-20

Applicant: Masaki Yoneda

Inventor： Masaki Yoneda

IPC: H01C1/12

CPC classification number: H01C17/006 ,  H01C1/148 ,  H01C7/003 ,  H01C17/28 ,  H01C17/281 ,  H01C17/288 ,  Y10T29/49082 ,  Y10T29/49101

Abstract: A method of manufacturing a chip resistor includes the following steps. A resistor layer is formed on an obverse surface of a material substrate. A plurality of substrate sections are defined in the material substrate by forming, in the obverse surface of the material substrate, a plurality of first grooves each of which is elongated in a first direction. A conductor layer is formed in each of the first grooves. The substrate sections are cut along lines extending in a second direction different from the first direction.

Abstract translation: 制造片式电阻器的方法包括以下步骤。 在材料基板的正面上形成电阻层。 通过在材料基板的正面中形成多个在第一方向上被拉长的多个第一凹槽，在材料基板中形成多个基板部分。 导体层形成在每个第一凹槽中。 沿着沿与第一方向不同的第二方向延伸的线切割衬底部分。

公开(公告)号：US20120134059A1

公开(公告)日：2012-05-31

申请号：US13367399

申请日：2012-02-07

Applicant: Takahiro SUMI ,  Takahiro KITADUME ,  Jun ADACHI ,  Takayuki TSUKIZAWA ,  Masanori OKAMOTO

Inventor： Takahiro SUMI ,  Takahiro KITADUME ,  Jun ADACHI ,  Takayuki TSUKIZAWA ,  Masanori OKAMOTO

IPC: H02H9/04 ,  B05D3/02 ,  B05D5/12

CPC classification number: H01T4/10 ,  H01C1/028 ,  H01C1/148 ,  H01C7/003 ,  H01C7/1006 ,  H01C17/02

Abstract: An ESD protection device includes a ceramic base material, a pair of opposed electrodes provided on a surface of or in the ceramic base material, and a discharge auxiliary electrode film arranged to connect the pair of opposed electrodes, wherein the discharge auxiliary electrode film is composed of a material containing, as its main constituents, metallic particles and glass covering the metallic particles. The discharge auxiliary electrode film is formed by providing an electrode paste containing glass-coated metallic particles that have an approximately 15% rate of increase in weight at about 400° C. for about 2 hours in air, a resin binder, and a solvent so as to connect the pair of opposed electrodes to each other, and then firing at a temperature of about 600° C. or more, higher than a softening point of glass of the glass-coated metallic particles, and not +200° C. higher than the softening point.

Abstract translation: ESD保护装置包括陶瓷基材，设置在陶瓷基材的表面或陶瓷基材的表面上的一对相对的电极和布置成连接一对相对的电极的放电辅助电极膜，其中组成放电辅助电极膜 包含金属颗粒和覆盖金属颗粒的玻璃作为其主要成分的材料。 放电辅助电极膜通过提供含有玻璃涂覆的金属颗粒的电极浆料，其在空气中，约400℃下具有约15％的重量增加率，约2小时，树脂粘合剂和溶剂，因此 将一对相对的电极彼此连接，然后在高于玻璃涂覆的金属颗粒的玻璃的软化点的约600℃或更高的温度下烧制，而不是+ 200℃更高 比软化点。

公开(公告)号：US08089337B2

公开(公告)日：2012-01-03

申请号：US11779703

申请日：2007-07-18

Applicant: Roger Brummell ,  Angie Privett

Inventor： Roger Brummell ,  Angie Privett

IPC: H01C7/18

CPC classification number: H01C7/003 ,  H01C1/01 ,  H01C17/065 ,  H05B3/48 ,  Y10T29/49082 ,  Y10T29/49099

Abstract: A resistive device for use in providing a resistive load to a target under the application of power from a power source is provided, the resistive device being adapted for electrical connection to the power source through a pair of terminal wires. The resistive device includes a thick film material, and the thick film material defines at least one layer of tape. The resistive device can be, by way of example, a heater or a load resistor, and can also include a substrate onto which a layer of dielectric tape is disposed, a resistive layer disposed on the layer of dielectric tape, and a protective layer disposed on the resistive layer.

Abstract translation: 提供了一种用于在从电源施加电力的情况下向目标提供电阻性负载的电阻性装置，所述电阻装置适于通过一对端子线与电源电连接。 电阻器件包括厚膜材料，厚膜材料限定至少一层胶带。 电阻器件可以是例如加热器或负载电阻器，并且还可以包括其上布置介质带层的衬底，设置在介质带层上的电阻层和设置在电介质带层上的保护层 在电阻层上。

公开(公告)号：US08085551B2

公开(公告)日：2011-12-27

申请号：US12050814

申请日：2008-03-18

Applicant: Seiji Karasawa ,  Koji Fujimoto

Inventor： Seiji Karasawa ,  Koji Fujimoto

IPC: H05K7/00 ,  H05K3/30

CPC classification number: H01C7/003 ,  H01C1/148 ,  H01C17/006 ,  H01C17/281 ,  Y10T29/49082 ,  Y10T29/49098 ,  Y10T29/49099 ,  Y10T29/49101 ,  Y10T29/4913

Abstract: The present invention is to provide an electronic component where positional accuracy for arranging members constituting a circuit element such as a resistor element and the like is mitigated and corrosion of a terminal electrode caused by sulfur in the atmosphere is reduced. The four chips connected resistor device 1 as an electronic component comprises: an insulating substrate 2 including a front surface 2a, a back surface 2b and a side surface 2c connecting the front surface 2a with the back surface 2b; a pair of terminal electrodes placed on the front and back surfaces 2a and 2b and the side surface 2c; a resistor element 5 including a resistor member 4 connected to the pair of terminal electrodes, and a protective layer (a glass film 6 and an overcoating film 7) for protecting the resistor member 4: the auxiliary electrode 9 placed with covering the interface 8 between the overcoating film 7 and the terminal electrode 3; and a nickel plated layer 10 and a solder plated layer 11 placed on the surfaces of the terminal electrode 3 and the auxiliary electrode 9. The interface 8 is placed at the end portion 2c of the insulating substrate 2.

Abstract translation: 本发明提供一种电子部件，其中减轻了构成诸如电阻元件等的电路元件的构件的位置精度，减小了由大气中的硫引起的端子电极的腐蚀。 连接有作为电子部件的电阻器1的四个芯片包括：绝缘基板2，其包括前表面2a，后表面2b和连接前表面2a与背面2b的侧表面2c; 放置在前表面2a和后表面2b以及侧表面2c上的一对端子电极; 包括连接到一对端子电极的电阻器件4的电阻元件5以及用于保护电阻元件4的保护层（玻璃膜6和外涂膜7）：将覆盖接口8的辅助电极9 外涂膜7和端电极3; 以及设置在端子电极3和辅助电极9的表面上的镀镍层10和焊料镀层11.界面8设置在绝缘基板2的端部2c处。

公开(公告)号：US20110080251A1

公开(公告)日：2011-04-07

申请号：US12995867

申请日：2009-06-01

Applicant: Katsumi Takeuchi ,  Yutaka Nomura ,  Hiroyuki Kurokawa

Inventor： Katsumi Takeuchi ,  Yutaka Nomura ,  Hiroyuki Kurokawa

IPC: H01C1/034 ,  H05K3/10

CPC classification number: H01C7/003 ,  H01C1/06 ,  H01C17/006 ,  H01C17/06506 ,  Y10T29/49155

Abstract: A chip-like electric component such as a chip resistor is provided, which is easy to manufacture and in which cracks or fractures of an insulating substrate are unlikely to occur. A pair of surface electrodes 21, 23 are formed so that thicknesses of the pair of surface electrodes increase from a resistor layer 13 toward end portions 30 of an insulating substrate 29 in a direction in which the pair of surface electrodes 21, 23 are arranged. A plating reservoir S is formed between one of the surface electrodes 21, 23 and an insulating protective layer 15. When forming at least one plated layer 33, a plated metal pools in the plating reservoir S. The at least one plated layer 33 may work to reduce to some extent a height difference between a soldering electrode portion 21, 23, 27, 33 and the insulating protective layer 15.

Abstract translation: 提供了诸如片状电阻器的芯片状电气部件，其易于制造，并且其中不可能发生绝缘基板的裂纹或断裂。 形成一对表面电极21,23，使得一对表面电极的厚度从电阻层13朝向绝缘基板29的端部配置在一对表面电极21,23的方向上增加。 在一个表面电极21,23和绝缘保护层15之间形成电镀槽S.当形成至少一个镀层33时，电镀金属池在电镀槽S中。至少一个镀层33可以工作 以在一定程度上减少焊接电极部分21,23,27,33与绝缘保护层15之间的高度差。

公开(公告)号：US07907046B2

公开(公告)日：2011-03-15

申请号：US11991513

申请日：2006-09-04

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1/012

CPC classification number: H01C1/012 ,  H01C1/142 ,  H01C7/003 ,  H01C17/006 ,  Y10T29/49099 ,  Y10T29/49101

Abstract: The chip resistor (1) of the present invention includes an insulating substrate (2) in the form of a chip, a pair of terminal electrodes (3, 4) formed on both ends of the insulating substrate (2), a plurality of resistor films (5) formed on an obverse surface of the insulating substrate (2) in parallel with each other between the paired terminal electrodes (3, 4), and a cover coat formed on the obverse surface of the insulating substrate (2) to cover the resistor films (5). In the chip resistor (1), one of the terminal electrodes (3) includes individual upper electrodes (8) each formed on the obverse surface of the insulating substrate (3, 4) to be independently connected to a respective one of the resistor films (5) and a side electrode (9) formed on a side surface of the insulating substrate (2) to be connected to all the individual upper electrodes (8).

Abstract translation: 本发明的芯片电阻器（1）包括芯片形式的绝缘基板（2），形成在绝缘基板（2）两端的一对端子电极（3,4），多个电阻器 在绝缘基板（2）的正面上在成对的端子电极（3,4）之间彼此平行地形成的膜（5）和形成在绝缘基板（2）的正面上的覆盖膜 电阻膜（5）。 在片状电阻器（1）中，端子电极（3）中的一个包括各自形成在绝缘基板（3,4）的正面上的独立的上电极（8），以独立地连接到电阻膜 （5）和形成在绝缘基板（2）的侧表面上以与所有单独的上电极（8）连接的侧电极（9）。

公开(公告)号：US20110057766A1

公开(公告)日：2011-03-10

申请号：US12773152

申请日：2010-05-04

Applicant: Ching-Feng CHEN ,  Kun-Hong SHIH ,  Yen-Ting LIN ,  Yin-Tien YEH

Inventor： Ching-Feng CHEN ,  Kun-Hong SHIH ,  Yen-Ting LIN ,  Yin-Tien YEH

IPC: H01C1/034

CPC classification number: H01C17/006 ,  H01C7/003 ,  H01C7/13 ,  H01C17/02 ,  H01C17/065

Abstract: A surface mount resistor includes a resistance body, a first protective layer, a heat-transfer layer, a second protective layer and two electrode layers. The resistance body has a first end portion, a second end portion and a central portion between the first end portion and the second end portion. The first protective layer is disposed on the central portion of the resistance body, and the first end portion and the second end portion are exposed. The heat-transfer layer is plated on at least part of the resistance body. The second protective layer is disposed on at least part of the heat-transfer layer. The electrode layers are respectively arranged on the first end portion and the second end portion, and electrically connected with the heat-transfer layer.

Abstract translation: 表面贴装电阻器包括电阻体，第一保护层，传热层，第二保护层和两个电极层。 电阻体具有在第一端部和第二端部之间的第一端部，第二端部和中心部。 第一保护层设置在电阻体的中心部分，第一端部和第二端部露出。 传热层被电镀在电阻体的至少一部分上。 第二保护层设置在传热层的至少一部分上。 电极层分别设置在第一端部和第二端部上，与传热层电连接。

公开(公告)号：US07786842B2

公开(公告)日：2010-08-31

申请号：US11883856

申请日：2006-02-28

Applicant: Torayuki Tsukada ,  Masaki Yoneda

Inventor： Torayuki Tsukada ,  Masaki Yoneda

IPC: H01C1/012

CPC classification number: H01C1/148 ,  H01C1/032 ,  H01C1/14 ,  H01C7/003 ,  H01C17/006 ,  Y10T29/49099

Abstract: The chip resistor (1) includes an insulating substrate (2) and a main upper electrode (4) formed on a main surface of the insulating substrate (2). On the main surface of the insulating substrate (2), a resistor film (5) including an end (5a) overlapping the upper surface of main upper electrode (4) is formed. The resistor film (5) is covered by a protective coat (7, 8). An auxiliary upper electrode (6) is formed on the upper surface of the main upper electrode (4). The auxiliary upper electrode (6) includes an inner end (6a) overlapping the upper surface of the end (5a) of the resistor film (5). The protective coat (7, 8) overlaps the inner end (6a) of the auxiliary upper electrode (6).

Abstract translation: 芯片电阻器（1）包括绝缘基板（2）和形成在绝缘基板（2）的主表面上的主上电极（4）。 在绝缘基板（2）的主表面上，形成包括与主上电极（4）的上表面重叠的端部（5a）的电阻膜（5）。 电阻膜（5）被保护层（7,8）覆盖。 辅助上电极（6）形成在主上电极（4）的上表面上。 辅助上电极（6）包括与电阻膜（5）的端部（5a）的上表面重叠的内端（6a）。 保护涂层（7,8）与辅助上电极（6）的内端（6a）重叠。