公开(公告)号：US10236905B1

公开(公告)日：2019-03-19

申请号：US15901177

申请日：2018-02-21

Applicant: Analog Devices Global Unlimited Company

Inventor： Andreas Callanan ,  Adrian Sherry ,  Gabriel Banarie ,  Colin G. Lyden

IPC: H03M1/06 ,  H03M3/00 ,  H03H17/02

Abstract: Techniques to increase a data throughput rate of a filter circuit by preloading selectable memory circuits of the filter circuit with reference data, sampling input data at an input of the filter circuit, combining the sampled input data with the preloaded reference data, and generating a filter output based on the combined sampled input data and preloaded reference data.

公开(公告)号：US10224951B2

公开(公告)日：2019-03-05

申请号：US15276561

申请日：2016-09-26

Applicant: Analog Devices Global

Inventor： Venkata Aruna Srikanth Nittala ,  Avinash Gutta

IPC: H03M3/02 ,  H03M3/00 ,  H03M1/10

Abstract: A continuous-time sigma delta modulator circuit includes a scaling circuit that scales an input analog signal by a selectable range of different scaling factors in order to change a range of signal levels of the input analog signal to a desired range of signal levels in a scaled analog signal prior to conversion of the scaled analog signal to a digital signal. The scaling factor is selected based on the range of signal levels of the input analog signal in order to provide signal levels of the scaled signal within a desired range. The scaling circuit maintains current flow of the input analog signal at a substantially constant level regardless of the different scaling factors that are used to scale the input analog signal.

公开(公告)号：US10219090B2

公开(公告)日：2019-02-26

申请号：US13779314

申请日：2013-02-27

Applicant: Analog Devices Global

Inventor： Robert Adams ,  Kim Spetzler Berthelsen

IPC: H04R29/00 ,  H04R3/00

Abstract: The present invention relates in one aspect to a method of detecting diaphragm excursion of an electrodynamic loudspeaker. The method comprises steps of generating an audio signal for application to a voice coil of the electrodynamic loudspeaker and adding a high-frequency probe signal to the audio signal to generate a composite drive signal. The method further comprises a step of applying the composite drive signal to the voice coil through an output amplifier and detecting a modulation level of a probe signal current flowing through the voice coil.

公开(公告)号：US10187075B1

公开(公告)日：2019-01-22

申请号：US15974548

申请日：2018-05-08

Applicant: Analog Devices Global Unlimited Company

Inventor： Sharvil Pradeep Patil ,  Hajime Shibata ,  Yunzhi Dong ,  David Nelson Alldred ,  Frank Murden ,  Lawrence A. Singer

IPC: H03M1/00 ,  H03M1/16 ,  H03M1/06

Abstract: Residue generation systems for use in continuous-time and hybrid ADCs are described. An exemplary system includes a filter, e.g. a FIR filter, for generating a filtered analog output based on an analog input, a quantizer for generating a digital input to a feedforward DAC based on the filtered analog output generated by the filter, a feedforward DAC for generating a feedforward path analog output based on the digital input generated by the quantizer, and a subtractor for generating a residue signal based on the feedforward path analog output. Providing a filter that filters the analog input before it is quantized advantageously allows blockers to be attenuated before they are sampled and aliased by the quantizer. At least some of the residue generation systems described herein may be implemented with relatively small design and power dissipation overheads.

公开(公告)号：US10181853B2

公开(公告)日：2019-01-15

申请号：US15456160

申请日：2017-03-10

Applicant: Analog Devices Global

Inventor： Colm Slattery ,  Patrick C. Kirby ,  Albert O'Grady ,  Denis O'Connor ,  Michael Collins ,  Valerie Hamilton ,  Aidan J. Cahalane ,  Michal Brychta

IPC: H03K19/0175 ,  H01L27/02 ,  H03K19/177 ,  G01R31/317

Abstract: Systems for monitoring or control can include reconfigurable input and output channels. Such reconfigurable channels can include as few as a single terminal and a ground pin, or such channels can include three or four terminal configuration such as for use in four-terminal resistance measurements. Channel reconfiguration can be accomplished such as using software-enabled or firmware-enabled control of channel hardware. Such channel hardware can include analog-to-digital and digital-to-analog conversion capability, including use of a digital-to-analog converter to provide field power or biasing. In an example, the interface circuit can provide a selectable impedance.

公开(公告)号：US20180360359A1

公开(公告)日：2018-12-20

申请号：US15622846

申请日：2017-06-14

Applicant: Analog Devices Global

Inventor： John Jude O'Donnell ,  Colin G. Lyden ,  Michael C.W. Coln

IPC: A61B5/1455 ,  G01J1/46 ,  G01J1/08 ,  A61B5/00

Abstract: A photometry device can include a first LED to emit light to a target in response to a first current through the first LED, a second LED to emit light to the target in response to a second current through the second LED, and an inductor, coupled to the first and second LEDs, to store energy associated with at least one of the first and second currents.

公开(公告)号：US10116368B2

公开(公告)日：2018-10-30

申请号：US14912057

申请日：2014-08-15

Applicant: Analog Devices Global

Inventor： Conor O'Keeffe ,  Michael O'Brien ,  Sean Sexton

IPC: H01Q1/24 ,  H01Q3/26 ,  H04B7/04 ,  H04B7/06 ,  H04B17/11 ,  H04B17/12 ,  H04B17/14 ,  H04W16/28 ,  H04B7/0408 ,  H04B7/0491

Abstract: A communication unit comprises a plurality of antenna element feeds (203, 205) for coupling to a plurality of antenna elements of an antenna array, where each antenna element feed comprises at least one coupler; and a plurality of transmitters operably coupled to the plurality of antenna element feeds. At least one transmitter of the plurality of transmitters comprises: an input for receiving a first signal and at least one second signal; beamformer logic arranged to apply independent beamform weights (RefBF1, RefBF2) on the first signal and the at least one second signal of the transmitter respectively, wherein each of the independent beamform weights is allocated on a per sector basis; and a signal combiner arranged to combine the first signal and the second signal to produce a combined signal, such as that the combined signal supports a plurality of sectored beams.

公开(公告)号：US10097233B2

公开(公告)日：2018-10-09

申请号：US14826316

申请日：2015-08-14

Applicant: ANALOG DEVICES GLOBAL

Inventor： Patrick Pratt

IPC: H04B7/06 ,  H04B1/525 ,  H04L5/14 ,  H04W4/70 ,  H04L25/00

Abstract: Embodiments of full duplex radios are disclosed herein. For example, a radio may include: a first transmitter, a second transmitter, and a receiver. The first transmitter may be configured to receive an input signal, process the input signal to generate a first transmit signal, and transmit the first transmit signal. The second transmitter may be configured to receive the input signal, process the input signal to generate a second transmit signal, and couple the second transmit signal into an input path of the receiver. Leakage at the receiver may thus be reduced. Some embodiments of a radio may also include a base band correction circuit and means for reducing transmitter noise that leaks into the receiver.

公开(公告)号：US10075179B1

公开(公告)日：2018-09-11

申请号：US15668088

申请日：2017-08-03

Applicant: Analog Devices Global

Inventor： Michael D. Keane ,  Johan H. Mansson ,  Dennis A. Dempsey

IPC: H03M1/66 ,  H03M1/76 ,  H03M1/70

CPC classification number: H03M1/765 ,  H03M1/661 ,  H03M1/662 ,  H03M1/68 ,  H03M1/70

Abstract: A multiple impedance string, multiple output digital-to-analog converter (DAC) circuit that can include a shared coarse resolution DAC, two first fine resolution DACs to receive outputs of the MSB DAC, and a multiplexer to multiplex outputs of the first and second fine resolution DACs to output terminals. The multiplexer can be configured to interchange coupling of the outputs of the first and second fine resolution DACs using one or more MSBs.

公开(公告)号：US20180254774A1

公开(公告)日：2018-09-06

申请号：US15906160

申请日：2018-02-27

Applicant: Analog Devices Global Unlimited Company

Inventor： Bartholomeus Jacobus Thijssen ,  Eric Antonius Maria Klumperink ,  Bram Nauta ,  Philip Eugene Quinlan

IPC: H03K5/1252 ,  H03L7/099 ,  H03L7/093 ,  H03L7/08 ,  G06F1/06

CPC classification number: H03K5/1252 ,  G06F1/06 ,  H03K2005/00019 ,  H03L7/0802 ,  H03L7/093 ,  H03L7/0991

Abstract: Clock systems with phase noise compensation are provided herein. In certain implementations, a clock system includes a phase noise detector for detecting a phase noise of a clock signal, and an adjustable delay circuit for generating an adjusted clock signal based on delaying the clock signal with a controllable delay. Additionally, the phase noise detector generates an error signal indicated the phase noise of the clock signal, and controls the delay of the adjustable delay circuit with the error signal over time to thereby compensate the clock signal for phase noise. Thus, the adjusted clock signal has reduced phase noise compared to the clock signal.