Methods and apparatus for demodulating digital signals

    公开(公告)号:US12119968B2

    公开(公告)日:2024-10-15

    申请号:US18364308

    申请日:2023-08-02

    CPC classification number: H04L27/22 G06F3/04162 G06F3/04166 H03M1/124

    Abstract: A device includes an analog to digital converter configured to convert voltages into a digital signal by sampling the voltages at a fixed sampling time; a first multiplier configured to multiply the digital signal with in-phase coefficients, the in-phase coefficients generated to produce a demodulated in-phase signal at a demodulation signal frequency; a first adder configured accumulate the demodulated in-phase signal to output in-phase magnitude values; a second multiplier configured to multiply the digital signal with quadrature coefficients, the quadrature coefficients generated to produce a demodulated quadrature signal at the demodulation signal frequency; and a second adder configured to accumulate the demodulated quadrature signal to output quadrature magnitude values.

    VERTICAL METAL SENSING METHOD FOR DC-DC CONVERTER

    公开(公告)号:US20230275502A1

    公开(公告)日:2023-08-31

    申请号:US18106629

    申请日:2023-02-07

    Inventor: Yannick GUEDON

    CPC classification number: H02M1/0009 G01R19/0092 H02M3/07

    Abstract: In a DC-DC converter, a layout is designed to enable utilization the conductive trace connecting the converter output node to an output bump at which the load is attached as a sense resistor. The layout forces the output current down into lower metallization levels of an interconnect layer reaching the converter output node before the output current flows up into this conductive trace and out through the output bump. The conductive trace includes resistive pillars connected in parallel or series between the lower metallization levels and a top metallization layer of the conductive trace, with these resistive pillars being substantially greater in resistance than the lower metallization levels and the top metallization layer of the conductive trace.

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