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公开(公告)号:US20240235826A1
公开(公告)日:2024-07-11
申请号:US18444225
申请日:2024-02-16
Applicant: Mellanox Technologies, Ltd.
Inventor: Elad MENTOVICH , Itshak KALIFA , Ioannis (Giannis) PATRONAS , Paraskevas BAKOPOULOS , Eyal WALDMAN
CPC classification number: H04L9/0858 , H04B10/70
Abstract: Embodiments are disclosed for a quantum key distribution enabled intra-datacenter network. An example system includes a first vertical cavity surface emitting laser (VCSEL), a second VCSEL and a network interface controller. The first VCSEL is configured to emit a first optical signal associated with data. The second VCSEL is configured to emit a second optical signal associated with quantum key distribution (QKD). Furthermore, the network interface controller is configured to manage transmission of the first optical signal associated with the first VCSEL and the second optical signal associated with the second VCSEL via an optical communication channel coupled to a network interface module.
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352.
公开(公告)号:US20240232672A1
公开(公告)日:2024-07-11
申请号:US18492315
申请日:2023-10-23
Applicant: Mellanox Technologies, Ltd. , Bar-Ilan University
Inventor: Yuval IDAN , Avishai ELITZUR , Elad MENTOVICH , Tali SEPTON , Eliahu COHEN , Taylor Lee PATTI , Moshe ORON , Yonatan PIASETZKY
IPC: G06N10/20
CPC classification number: G06N10/20
Abstract: Methods, apparatuses, and computer program products for intercepting a transmitted value and resending quantum particles to avoid detection on a quantum interconnect link are provided. An example method includes, intercepting a subset of quantum particles transmitted on the quantum interconnect link. The method further includes determining characteristics of one or more degrees of freedom of the subset of intercepted quantum particles. Additionally, the method includes inferring the value based on the characteristics of the one or more degrees of freedom of the subset of intercepted quantum particles. The method continues by predicting a state of the one or more degrees of freedom of the subset of intercepted quantum particles. Further, the method includes encoding an output subset of quantum particles with characteristics based at least in part on the predicted state and transmitting the output subset of quantum particles on the quantum interconnect link.
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353.
公开(公告)号:US20240231984A9
公开(公告)日:2024-07-11
申请号:US18074751
申请日:2022-12-05
Applicant: Mellanox Technologies, Ltd.
Inventor: Natan Manevich , Dotan David Levi , Shay Aisman , Ariel Almog , Ran Avraham Koren
IPC: G06F11/07
CPC classification number: G06F11/0757 , G06F11/0736
Abstract: A device includes a hardware block to perform a hardware process and internal logic coupled between a processing device, which executes instructions, and the hardware block. The internal logic can one of measure execution time or count clock cycles of at least a portion of the hardware process. The internal logic can further, in response to the measured execution time or the counted clock cycles satisfying a predetermined condition, provide data associated with the one of the execution time measurement or the clock cycles count to the processing device, the data being statistically indicative of a latency of data packets sent by the hardware process over a total time the hardware process executes.
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354.
公开(公告)号:US20240231888A9
公开(公告)日:2024-07-11
申请号:US17971986
申请日:2022-10-24
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Sayantan Sur , Shahaf Shuler , Doron Haim , Netanel Moshe Gonen , Stephen Anthony Bernard Jones
IPC: G06F9/48
CPC classification number: G06F9/4825
Abstract: Techniques described herein include managing scheduling of interrupts by receiving a data packet comprising an indication of an interrupt to be delivered, determining an availability status of a processing thread, and managing an interrupt status indicator in response to determining the availability status. A value of the interrupt status indicator corresponds to a quantity of pending interrupts. An event handling circuit processes the interrupt or one or more pending interrupts using the processing thread.
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公开(公告)号:US12032963B2
公开(公告)日:2024-07-09
申请号:US17709464
申请日:2022-03-31
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Ilan Pardo , Evgeny Pimenov
CPC classification number: G06F9/30145 , G06F1/08 , G06F9/30105
Abstract: A processor includes a set of registers and a processing core. The processing core is configured to execute instructions, including an instruction that causes the core to reset a plurality of the registers in the set.
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公开(公告)号:US12028661B2
公开(公告)日:2024-07-02
申请号:US17869932
申请日:2022-07-21
Applicant: Mellanox Technologies, Ltd.
Inventor: Ioannis (Giannis) Patronas , Dotan David Levi , Wojciech Wasko , Paraskevas Bakopoulos , Dimitrios Syrivelis , Elad Mentovich
IPC: H04B10/2575 , H04B10/40 , H04B10/50 , H04B10/60 , H04Q11/00
CPC classification number: H04Q11/0005 , H04B10/25753 , H04B10/40 , H04B10/50 , H04B10/60 , H04Q2011/0045 , H04Q2011/005
Abstract: Network devices and associated methods are provided for synchronization in an optically switched network. The network device includes one or more ports in communication with a plurality of devices via an optical switch. The one or more ports receive a master clock signal having a first frequency from a first device of the plurality of devices. The network device includes a local clock in communication with the one or more ports and operating at a second frequency. The network device includes a synchronization manager in communication with the one or more ports and the local clock and configured to be enabled and disabled. When the synchronization manager is enabled, it receives the master clock signal via the one or more ports and transmits an instruction to the local clock to operate at the first frequency.
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公开(公告)号:US12028155B2
公开(公告)日:2024-07-02
申请号:US17534776
申请日:2021-11-24
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Bar Shapira , Ariel Almog , Dotan David Levi , Natan Manevich , Thomas Kernen , Liron Mula
IPC: H04J3/06
CPC classification number: H04J3/0638
Abstract: A system for maintaining a Precision Time Protocol (PTP) hardware clock, the system being operative in conjunction with a network device which is external to the system, the system comprising a controller to receive information characterizing a network peer oscillator frequency, wherein the information was extracted from an RX symbol rate, and to adjust the PTP Hardware Clock's frequency responsive to the information characterizing the network peer oscillator frequency.
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公开(公告)号:US20240205021A1
公开(公告)日:2024-06-20
申请号:US18497000
申请日:2023-10-30
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Nir Eilam , Yuval Itkin , Haim Kupershmidt , Yigal Edery , Uriya Stern , Boaz Shahar , Mor Sfadia
CPC classification number: H04L9/3247 , H04L9/0825 , H04L9/3263
Abstract: In one embodiment, a device includes a memory to store a first public key indicating security ownership of the device by a first owner, an interface to receive a signature of an intermediate public key signed by a first owner signing service with a first private key, and processing circuitry to load the intermediate public key in the memory, responsively to authenticating the signature, and remove the first public key from the memory, and wherein the interface is to receive a second public key and a signature of the second public key signed by a second owner signing service with an intermediate private key, the processing circuitry is to load a second public key in the memory indicating ownership has been transferred to the second owner responsively to authenticating the signature of the second public key with the intermediate public key, and remove the intermediate public key from the memory.
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公开(公告)号:US12015533B2
公开(公告)日:2024-06-18
申请号:US17956035
申请日:2022-09-29
Applicant: Mellanox Technologies, Ltd.
Inventor: Ioannis (Giannis) Patronas , Tamar Viclizki Cohen , Vadim Gechman , Dimitrios Syrivelis , Paraskevas Bakopoulos , Nikolaos Argyris , Elad Mentovich
IPC: H04L43/065 , H04L41/16 , H04L43/0817 , H04L45/28
CPC classification number: H04L43/065 , H04L41/16 , H04L43/0817 , H04L45/28
Abstract: Systems, computer program products, and methods are described herein for machine learning (ML) based system for network resilience and steering. An example system monitors data movement across one or more network ports; extracts network performance indicators associated with the data movement; determines, via a machine learning (ML) subsystem, that a status of a first network port is indicative of operational failure based on at least the network performance indicators; determines that the first network port is associated with a first network port cluster; determines a redundant network port and an intermediate network switch associated with the first network port cluster; and triggers the intermediate network switch to reroute a portion of network traffic from the first network port to the redundant network port in response to the status of the first network port.
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公开(公告)号:US20240195892A1
公开(公告)日:2024-06-13
申请号:US18586613
申请日:2024-02-26
Applicant: MELLANOX TECHNOLOGIES, LTD.
IPC: H04L69/22 , H04L45/74 , H04L45/745
CPC classification number: H04L69/22 , H04L45/742 , H04L45/74591
Abstract: A network device includes one or more ports, and action-select circuitry. The ports are to exchange packets over a network. The action-select circuitry is to determine, for a given packet, a first search key based on a first header field of the given packet, and a second search key based on a second header field of the given packet, to compare the first search key to a first group of compare values, to output a multi-element vector responsively to a match between the first search key and a first compare value, to generate a composite search key by concatenating the second search key and the multi-element vector, to compare the composite search key to a second group of compare values, and, responsively to a match between the composite search key and a second compare value, to output an action indicator for applying to the given packet.
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